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參數資料
型號: UDA1352HL
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: 48 kHz IEC 60958 audio DAC
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-313-2, LQFP-48
文件頁數: 16/64頁
文件大小: 262K
代理商: UDA1352HL
2003 Mar 25
16
Philips Semiconductors
Preliminary specification
48 kHz IEC 60958 audio DAC
UDA1352HL
8.7.1
S
TATIC PIN CONTROL MODE
The functions of the static pins in static pin control mode are described in Table 4.
Table 4
Pin descriptions in static pin control mode
PIN
NAME
VALUE
FUNCTION
Mode selection pin
38
SELSTATIC
1
select static pin control mode; must be connected to V
DDD
Input pins
1
RESET
0
1
0
00
01
10
11
0
1
0
1
0
1
0
1
normal operation
reset
must be connected to V
SSD
select I
2
S-bus format for digital data interface
select LSB-justified format 16 bits for digital data interface
select LSB-justified format 20 bits for digital data interface
select LSB-justified format 24 bits for digital data interface
no mute
mute active
select input SPDIF 0 (channel 0)
select input SPDIF 1 (channel 1)
slave to f
s
from IEC 60958; master on data output and input interfaces
slave to f
s
from digital data input interface
select data from digital data interface to DAC output
select data from IEC 60958 decoder to DAC output
6
L3CLOCK
L3MODEand
L3DATA
10 and 5
13
MUTE
14
SELCHAN
21
SELCLK
22
SELSPDIF
Status pins
43
PCMDET
0
1
0
non-PCM data or burst preamble detected
PCM data detected
clock regeneration and IEC 60958 decoder out-of-lock or non-PCM
data detected
clock regeneration and IEC 60958 decoder locked and PCM data
detected
IEC 60958 input; no pre-emphasis
IEC 60958 input; f
s
= 32.0 kHz with pre-emphasis
IEC 60958 input; f
s
= 44.1 kHz with pre-emphasis
IEC 60958 input; f
s
= 48.0 kHz with pre-emphasis
23
LOCK
1
33 and 45
PREEM1and
PREEM0
00
01
10
11
Test pin
25
TEST
0
must be connected to V
SSD
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相關代理商/技術參數
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