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參數(shù)資料
| 型號(hào)： | UDA1380 |
| 英文描述： | Stereo audio coder-decoder for MD, CD and MP3 |
| 中文描述： | 立體聲音頻編碼器，可用于MD，CD和MP3解碼器 |
| 文件頁(yè)數(shù)： | 22/68頁(yè) |
| 文件大?。?/td> | 278K |
| 代理商： | UDA1380 |
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2002 Sep 16
22
Philips Semiconductors
Product specification
Stereo audio coder-decoder
for MD, CD and MP3
UDA1380
9.1
Introduction
The exchange of data and control information between the
microcontroller and the UDA1380, is accomplished
through a serial hardware interface comprising the
following pins:
L3DATA/SDA: microcontroller interface data line
L3MODE: microcontroller interface mode line
L3CLOCK/SCL: microcontroller interface clock line.
Information transfer via the microcontroller bus is
organized LSB first, and in accordance with the so called
‘L3’ format, in which two different modes of operation can
be distinguished: address mode and data transfer mode.
Inside the microcontroller there is a hand-shake
mechanism which takes care of proper data transfer from
the microcontroller clock, to the destination clock domains.
This means that when data is sent to the microcontroller
interface, the system clock must be running.
9.2
Device addressing
The device addressing mode is used to select a device for
subsequent data transfer. The address mode is
characterized by the signal on pin L3MODE being LOW
and a burst of 8 pulses on pin L3CLOCK/SCL,
accompanied by 8 bits. The fundamental timing is shown
in Figs 14 and 15.
Basically, two types of transfer can be defined:
data transfer to the device, and data transfer from the
device, as given in Table 6.
Table 6
Selection of data transfer
Table 6 shows that there are two types of data transfers:
DATA and STATUS which can be read and written.
Table 6 also shows that the DATA and STATUS read and
write actions are combined.
The device address consists of one byte, which is split-up
in two parts:
Bits 7 to 2 represent a 6-bit device address. In the
UDA1380 this is 000001
Bits 1 to 0 called Data Operation Mode, or DOM bits,
represent the type of data transfer according to Table 6.
9.3
Slave address
The UDA1380 acts as a slave receiver or a slave
transmitter.ThereforethesignalsL3CLOCKandL3MODE
are only input signals. The data signal L3DATA is a
bidirectional line. The UDA1380 slave address is shown in
Table 7.
Table 7
L3 slave address
9.4
Register addressing
After sending the device address, including the flags (the
DOM bits) whether information is read or written, one byte
is sent with the destination register address using 7 bits,
and one bit which signals whether information will be read
or written. The fundamental timing for L3 is given in Fig.19.
Basically there are three forms for register addressing:
Register addressing for L3 write: the first bit is a logic 0
indicating a write action to the destination register,
followed by seven register address bits
Prepare read addressing: the first bit of the byte is
logic 1; signalling data will be read from the register
indicated
The read action itself: in this case the device returns a
register address prior to sending data from that register.
When the first bit of the byte is logic 0, the register
address was valid, in case the first bit is a logic 1 the
register address was invalid.
Remarks
:
Each time a new destination address needs to be
written, the device address must be sent again
When addressing the device for the first time after
power-up of the device, at least one L3 clock-cycle must
be given to enable the L3 interface.
DOM
BIT 1
DOM
BIT 0
TRANSFER
0
0
1
1
0
1
0
1
not used
not used
DATA and STATUS write or pre-read
DATA and STATUS read
(MSB)
BIT
(LSB)
0
0
0
0
0
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UDA1380TT | Stereo audio coder-decoder for MD, CD and MP3 |
| UDA1384 | Multichannel audio coder-decoder |
| UDA1384H | Multichannel audio coder-decoder |
| UDN2878W-2 | 10A SCRS |
| UDZ2.4B | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UDA1380HN | 制造商:ICS 制造商全稱(chēng):ICS 功能描述:Stereo audio coder-decoder for MD, CD and MP3 |
| UDA1380HN/N2 | 制造商:NXP Semiconductors 功能描述:IC CODEC AUDIO MINIDISC 32HVQFN 制造商:NXP Semiconductors 功能描述:IC, CODEC, AUDIO, MINIDISC, 32HVQFN |
| UDA1380HN/N2,118 | 功能描述:接口—CODEC STEREO AUDIO RoHS:否 制造商:Texas Instruments 類(lèi)型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類(lèi)型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UDA1380HN-T | 功能描述:接口—CODEC STEREO AUDIO CODER-DECODER RoHS:否 制造商:Texas Instruments 類(lèi)型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類(lèi)型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UDA1380TT | 功能描述:接口—CODEC SSA CODEC RoHS:否 制造商:Texas Instruments 類(lèi)型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類(lèi)型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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