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參數資料
型號: UDA1380
英文描述: Stereo audio coder-decoder for MD, CD and MP3
中文描述: 立體聲音頻編碼器,可用于MD,CD和MP3解碼器
文件頁數: 49/68頁
文件大小: 278K
代理商: UDA1380
2002 Sep 16
49
Philips Semiconductors
Product specification
Stereo audio coder-decoder
for MD, CD and MP3
UDA1380
11.17 Decimator read-out
Table 67
Register address 28H
Table 68
Description of the register bits
4
SDETR1
Interpolator silence detect channel 1 right.
When this bit is logic 0:
interpolator on channel 1 right input has detected no silence. When this bit is
logic 1: interpolator on channel 1 right input has detected silence.
Interpolator silence detect channel 1 left.
When this bit is logic 0:
interpolator on channel 1 left input has detected no silence. When this bit is
logic 1: interpolator on channel 1 left input has detected silence.
Interpolator muting.
A 1-bit value which signals whether the interpolator has
reached mute or not. When this bit is logic 0: interpolator is not muted. When
this bit is logic 1: interpolator is muted.
Interpolator muting channel 2.
When this bit is logic 0: interpolator channel 2
is not muted. When this bit is logic 1: interpolator channel 2 is muted.
Interpolator muting channel 1.
When this bit is logic 0: interpolator channel 1
is not muted. When this bit is logic 1: interpolator channel 1 is muted.
3
SDETL1
2
MUTE_STATE_M
1
MUTE_STATE_CH2
0
MUTE_STATE_CH1
BIT
15
14
13
12
11
10
9
8
Symbol
BIT
7
6
5
4
3
2
1
0
Symbol
AGC_STAT
MT_ADC_STAT
OVERFLOW
BIT
SYMBOL
DESCRIPTION
15 to 5
4
AGC_STAT
not used
AGC gain status.
A 1-bit value which signals whether the AGC gain exceeds
8 dB or not. Only valid when the AGC is switched on. When this bit is logic 0:
AGC gain <8 dB. When this bit is logic 1: AGC gain
8 dB.
not used
Decimator mute.
A 1-bit value which signals whether the decimator has
reached mute or not. When this bit is logic 0: decimator has not muted. When
this bit is logic 1: decimator has muted.
not used
Digital output overflow detection.
A 1-bit value which signals whether the
digital output amplitude exceeds
1.16 dB or not. When this bit is logic 0: no
overflow detected (read-out). When this bit is logic 1: overflow detected
(read-out).
3
2
MT_ADC_STAT
1
0
OVERFLOW
BIT
SYMBOL
DESCRIPTION
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相關代理商/技術參數
參數描述
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UDA1380HN-T 功能描述:接口—CODEC STEREO AUDIO CODER-DECODER RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
UDA1380TT 功能描述:接口—CODEC SSA CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
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