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參數資料
| 型號： | UDA1380TT |
| 元件分類： | 通用總線功能 |
| 英文描述： | Stereo audio coder-decoder for MD, CD and MP3 |
| 中文描述： | 立體聲音頻編碼器，可用于MD，CD和MP3解碼器 |
| 文件頁數： | 13/68頁 |
| 文件大小： | 278K |
| 代理商： | UDA1380TT |
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2002 Sep 16
13
Philips Semiconductors
Product specification
Stereo audio coder-decoder
for MD, CD and MP3
UDA1380
8.2
ADC analog front-end
The analog front-end of the UDA1380 consists of one
stereo ADC with a selector in front of it (see Fig.6). Using
this selector one can either select the microphone input
with the microphone amplifier (LNA) with a fixed 29 dB
gain and VGA (no PGA, since a real microphone amplifier
ismuchbetterwithrespecttonoise),orthelineinputwhich
has a PGA for having 0 or 6 dB gain (for supporting 1 and
2 V (RMS)input).ThePGAalsoprovidesgaincontrolfrom
0 to 24 dB in steps of 3 dB.
Remarks
:
TheinputimpedanceofthePGA(lineinput)is12 k
,for
the LNA this is 5 k
The LNA is standard equipped with a microphone power
supply. Since this normally requires two extra pins, this
feature will not be used inside the UDA1380. Instead,
the microphone supply block is replaced by the VGA
block.
8.2.1
A
PPLICATIONS AND
P
OWER
-
DOWN MODES
The following Power-down modes and functional modes
are supported:
Power-down mode in which the power consumption is
very low (only leakage currents)
In this mode there is no reference voltage at the line
input
Line input mode, in which the PGA can be used
Microphone mode, in which the rest of the non-used
PGAs and ADCs are powered-down
Mixed PGA and LNA mode: one line input and one
microphone input.
More information on the analog frond-end is given in
Section 8.11.1.
handbook, full pagewidth
PGA
ADC
SEL_MIC
bitstream
right
ADC
SDC
bitstream
left
MGU530
PGA
31
(27)
(29)
(31)
VINL
1
VINR
3
VINM
SDC
LNA
SDC
Fig.6 Analog front-end.
Pin numbers for UDA1380HN in parentheses.
8.2.2
LNA
WITH
VGA
The LNA is equipped with a VGA. The function of the VGA
is to have additional variable analog gain from 0 to 30 dB
in steps of 2 dB. This provides more flexibility in the choice
of the microphone.
8.2.3
A
PPLICATIONS WITH
2 V (
RMS
)
INPUT
For the line input it is preferable to have 0 dB and 6 dB
gain settings in order to be able to apply both
1 and 2 V (RMS) input signals, using a series resistance.
For this purpose a PGA is used which has 0 to 24 dB gain,
in steps of 3 dB.
相關PDF資料 |
PDF描述 |
|---|---|
| UDA1384 | Multichannel audio coder-decoder |
| UDA1384H | Multichannel audio coder-decoder |
| UDN2878W-2 | 10A SCRS |
| UDZ2.4B | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
| UDZ10B | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
相關代理商/技術參數 |
參數描述 |
|---|---|
| UDA1380TT/N2 | 制造商:PHILIP 功能描述: |
| UDA1380TT/N2,512 | 功能描述:接口—CODEC SSA CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UDA1380TT/N2,518 | 功能描述:接口—CODEC SSA CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UDA1380TT-T | 功能描述:接口—CODEC SSA CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UDA1384 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Multichannel audio coder-decoder |
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