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參數(shù)資料
型號: UDA1384
廠商: NXP Semiconductors N.V.
英文描述: Multichannel audio coder-decoder
中文描述: 多聲道音頻編碼解碼器
文件頁數(shù): 32/55頁
文件大?。?/td> 276K
代理商: UDA1384
9397 750 14366
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 17 January 2005
32 of 55
Philips Semiconductors
UDA1384
Multichannel audio coder-decoder
11.6 Status output register
Table 36:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Status output register (address 0Fh) bit allocation
15
14
13
-
-
-
-
-
-
12
-
-
11
-
-
10
-
-
9
-
-
8
-
-
read only
7
-
-
6
-
-
5
4
3
2
1
0
VS
-
AS1
-
AS0
-
DS2
-
DS1
-
DS0
-
read only
Table 37:
Bit
15 to 6
5
Description of status output register bits
Symbol
Description
-
not used
VS
Voice ADC status.
Bit VS indicates the hard mute status of the voice ADC.
1 = power-down is ready and the clock may be disabled
0 = power-down is not ready and the clock should not be disabled
AS1
ADC 2 status.
Bit AS1 indicates the hard mute status of ADC 2.
1 = power-down is ready and the clock may be disabled
0 = power-down is not ready and the clock should not be disabled
AS0
ADC 1 status.
Bit AS0 indicates the hard mute status of ADC 1.
1 = power-down is ready and the clock may be disabled
0 = power-down is not ready and the clock should not be disabled
DS2
DAC channel 5 and 6 status.
Bit DS2 indicates the hard mute status of DAC
channel 5 and 6.
1 = power-down is ready and the clock may be disabled
0 = power-down is not ready and the clock should not be disabled
DS1
DAC channel 3 and 4 status.
Bit DS1 indicates the hard mute status of DAC
channel 3 and 4.
1 = power-down is ready and the clock may be disabled
0 = power-down is not ready and the clock should not be disabled
DS0
DAC channel 1 and 2 status.
Bit DS0 indicates the hard mute status of DAC
channel 1 and 2.
1 = power-down is ready and the clock may be disabled
0 = power-down is not ready and the clock should not be disabled
4
3
2
1
0
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