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參數(shù)資料
型號： 71M6543H-IGTR/F
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 模擬信號調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PQFP100
封裝： LEAD FREE, LQFP-100
文件頁數(shù)： 8/157頁
文件大小： 2178K
代理商： 71M6543H-IGTR/F
71M6543F/H and 71M6543G/GH Data Sheet
v1.2
2008–2011 Teridian Semiconductor Corporation
105
Name
Location Rst Wk Dir
Description
CHOP_E[1:0]
2106[3:2]
0
R/W
Chop enable for the reference bandgap circuit. The value of CHOP changes on the
rising edge of the internal MUXSYNC signal according to the value in CHOP_E[1:0]:
00 = toggle
1
01 = positive
10 = reversed
11 = toggle
1except at the mux sync edge at the end of an accumulation interval.
CHOPR[1:0]
2709[7:6]
00 00 R/W
The CHOP settings for the remote sensor.
00 = Auto chop. Change every MUX frame.
01 = Positive
10 = Negative
11 = Auto chop (same as 00)
DIFF0_E
210C[4]
0
R/W
Enables IADC0-IADC1 differential configuration.
DIFF2_E
210C[5]
0
R/W
Enables IADC2-IADC3 differential configuration.
DIFF4_E
210C[6]
0
R/W
Enables IADC4-IADC5 differential configuration.
DIFF6_E
210C[7]
0
R/W
Enables IADC6-IADC7 differential configuration.
DIO_R2[2:0]
DIO_R3[2:0]
DIO_R4[2:0]
DIO_R5[2:0]
DIO_R6[2:0]
DIO_R7[2:0]
DIO_R8[2:0]
DIO_R9[2:0]
DIO_R10[2:0]
DIO_R11[2:0]
DIO_RPB[2:0]
2455[2:0]
2455[6:4]
2454[2:0]
2454[6:4]
2453[2:0]
2453[6:4]
2452[2:0]
2452[6:4]
2451[2:0]
2451[6:4]
2450[2:0]
0
–
R/W
Connects PB and dedicated I/O pins DIO2 through DIO11 to internal resources. If more
than one input is connected to the same resource, the MULTIPLE column below specifies
how they are combined.
DIO_Rx
Resource
MULTIPLE
0
NONE
–
1
Reserved
OR
2
T0 (Timer0 clock or gate)
OR
3
T1 (Timer1 clock or gate)
OR
4
IO interrupt (int0)
OR
5
IO interrupt (int1)
OR
DIO_DIR[15:12]
DIO_DIR[11:8]
DIO_DIR[7:4]
DIO_DIR[3:0]
SFR B0[7:4]
SFR A0[7:4]
SFR 90[7:4]
SFR 80[7:4]
F
R/W
Programs the direction of the first 16 DIO pins. 1 indicates output. Ignored if the pin is
not configured as I/O. See DIO_PV and DIO_PW for special option for DIO0 and DIO1
outputs. See DIO_EEX[1:0] for special option for SEGDIO2 and SEGDIO3. Note that
the direction of DIO pins above 15 is set by SEGDIOx[1]. See PORT_E to avoid power-
up spikes.
DIO[15:12]
DIO[11:8]
DIO[7:4]
DIO[3:0]
SFR B0[3:0]
SFR A0[3:0]
SFR 90[3:0]
SFR 80[3:0]
F
R/W
The value on the first 16 DIO pins. Pins configured as LCD read zero. When written,
changes data on pins configured as outputs. Pins configured as LCD or input ignore
writes. Note that the data for DIO pins above 15 is set by SEGDIOx[0].
相關(guān)PDF資料
PDF描述
71M6543F-IGTR/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543H-IGT/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543G-IGTR/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543GH-IGTR/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543GH-IGT/F SPECIALTY ANALOG CIRCUIT, PQFP100
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71M6545 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Four-Quadrant Metering, Phase Metrology Processors Flash/RAM Size
71M6545H 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Four-Quadrant Metering, Phase Metrology Processors Flash/RAM Size
71M6545HT-IGT/F 制造商:Maxim Integrated Products 功能描述:METROLOGY PROCESSORS - Rail/Tube
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