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參數資料
型號： 73S1209F-68IMR/F
廠商： TERIDIAN SEMICONDUCTOR CORP
元件分類： 電源管理
英文描述： POWER SUPPLY MANAGEMENT CKT, QCC68
封裝： LEAD FREE, QFN-68
文件頁數： 82/123頁
文件大小： 1385K
代理商： 73S1209F-68IMR/F
DS_1209F_004
73S1209F Data Sheet
Rev. 1.2
61
1.7.11 Keypad Interface
Keypad Interface
The 73S1209F supports a 30-button (6 row x 5 column) keypad (SPST Mechanical Contact Switches)
interface using 11 dedicated I/O pins. Figure 11 shows a simplified block diagram of the keypad
interface.
The 73S1209F supports a 30-button (6 row x 5 column) keypad (SPST Mechanical Contact Switches)
interface using 11 dedicated I/O pins. Figure 11 shows a simplified block diagram of the keypad
interface.
Scan
pu
ll-
up
Debouncing
De
bo
un
ce
T
im
e
7
6
5
4
3
2
1
0
KSIZE Register
6
(1) KCOL is normally used as Read only
register. When hardware keyscan mode
is disabled, this register is to be used by
firmware to write the column data to
handle firmware scanning.
Key
_
D
e
te
ct
Hardware Scan Enable
6
Co
lu
m
n
Sc
an
O
rd
er
5
Column Value
Row Value
K
ey_D
et
ec
t_
E
nab
le
KORDERL / H Registers
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
KCOL Register
(1)
7
6
5
4
3
2
1
0
KROW Register
Dividers
1kHz
Sc
an
Ti
me
KSCAN Register
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
KSTAT Register
Keypad Clock
VDD
pu
ll-
up
COL4:0
RO
W5
:0
73S1209F
If smaller keypad than 6 x 5 is to be
implemented, unused row inputs
should be connected to VDD. Unused
column outputs should be left
unconnected.
VDD
Figure 11: Simplified Keypad Block Diagram
There are 5 drive lines (outputs) corresponding to columns and 6 sense lines (inputs) corresponding to
rows. Hysteresis and pull-ups are provided on all inputs (rows), which eliminate the need for external
resistors in the keypad. Key scanning happens by asserting one of the 5 column lines low and looking for
a low on a sense line indicating that a key is pressed (switch closed) at the intersection of the drive/sense
(col/row) line in the keypad. Key detection is performed by hardware with an incorporated debounce
timer. Debouncing time is adjustable through the KSCAN Register. Internal hardware circuitry performs
column scanning at an adjustable scanning rate and column scanning order through registers KSCAN
and KORDERL / KORDERH. Key scanning is disabled at reset and must be enabled by firmware. When
a valid key is detected, an interrupt is generated and the valid value of the pressed key is automatically
相關PDF資料
PDF描述
73S1209F-68IM/F POWER SUPPLY MANAGEMENT CKT, QCC68
73S1209F-44IMR/F POWER SUPPLY MANAGEMENT CKT, QCC44
73S1209F-44IM/F POWER SUPPLY MANAGEMENT CKT, QCC44
73S1210F-44IMR/F 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC44
73S1210F-68IM/F/P 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC68
相關代理商/技術參數
參數描述
73S1209F-68M/F/P1 功能描述:8位微控制器 -MCU Contained 80515-SoC Serial Hst Interface RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
73S1209F-EB 功能描述:開發板和工具包 - 8051 73S1209F Eval Brd (Doc. Cd, Cable) RoHS:否 制造商:Silicon Labs 產品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓:
73S1209F-IM44 DK 制造商:Maxim Integrated Products 功能描述:Development Boards & Kits - 8051 73S1209F Dev Kit Eval Bd Ice Cable Cd
73S1209F-IM44 EB 制造商:Maxim Integrated Products 功能描述:Development Boards & Kits - 8051 73S1209F Eval Brd Eval Bd Doc Cd Cable
73S1209F-IM68 DK 制造商:Maxim Integrated Products 功能描述:Development Boards & Kits - 8051 73S1209F Dev Kit Eval Bd Ice Cable Cd
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