欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號： A3PE1500-PQG208
元件分類： FPGA
英文描述： FPGA, 38400 CLBS, 1500000 GATES, PQFP208
封裝： 28 X 28 MM, 3.40 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, QFP-208
文件頁數： 111/152頁
文件大小： 4932K
代理商： A3PE1500-PQG208
ProASIC3E DC and Switching Characteristics
v1.2
2 - 49
LVPECL
Low-Voltage Positive Emitter-Coupled Logic (LVPECL) is another differential I/O standard. It
requires that one data bit be carried through two signal lines. Like LVDS, two pins are needed. It
also requires external resistor termination.
The full implementation of the LVDS transmitter and receiver is shown in an example in
Figure 2-23. The building blocks of the LVPECL transmitter-receiver are one transmitter macro, one
receiver macro, three board resistors at the transmitter end, and one resistor at the receiver end.
The values for the three driver resistors are different from those used in the LVDS implementation
because the output standard specifications are different.
Timing Characteristics
Figure 2-23 LVPECL Circuit Diagram and Board-Level Implementation
Table 2-77 Minimum and Maximum DC Input and Output Levels
DC Parameter
Description
Min.
Max.
Min.
Max.
Min.
Max.
Units
VCCI
Supply Voltage
3.0
3.3
3.6
V
VOL
Output LOW Voltage
0.96
1.27
1.06
1.43
1.30
1.57
V
VOH
Output HIGH Voltage
1.8
2.11
1.92
2.28
2.13
2.41
V
VIL, VIH
Input LOW, Input HIGH Voltages
0
3.3
0
3.6
0
3.9
V
VODIFF
Differential Output Voltage
0.625
0.97
0.625
0.97
0.625
0.97
V
VOCM
Output Common-Mode Voltage
1.762
1.98
1.762
1.98
1.762
1.98
V
VICM
Input Common-Mode Voltage
1.01
2.57
1.01
2.57
1.01
2.57
V
VIDIFF
Input Differential Voltage
300
mV
Table 2-78 AC Waveforms, Measuring Points, and Capacitive Loads
Input LOW (V)
Input HIGH (V)
Measuring Point* (V)
VREF (typ.) (V)
1.64
1.94
Cross point
–
* Measuring point = Vtrip. See Table 2-15 on page 2-18 for a complete table of trip points.
187 W
100
Ω
Z0 = 50 Ω
100
Ω
100
Ω
+
–
P
N
P
N
INBUF_LVPECL
OUTBUF_LVPECL
FPGA
Bourns Part Number: CAT16-PC4F12
Table 2-79 LVPECL
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI =3.0 V
Speed Grade
tDOUT
tDP
tDIN
tPY
Units
–F
0.79
2.19
0.05
1.96
ns
Std.
0.66
1.83
0.04
1.63
ns
–1
0.56
1.55
0.04
1.39
ns
–2
0.49
1.36
0.03
1.22
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-5 for derating
values.
相關PDF資料
PDF描述
A3PN060-FVQ100 FPGA, 1536 CLBS, 60000 GATES, PQFP100
A3PN060-FVQG100 FPGA, 1536 CLBS, 60000 GATES, PQFP100
A3PN060-ZFVQ100 FPGA, 1536 CLBS, 60000 GATES, PQFP100
A3PN060-ZFVQG100 FPGA, 1536 CLBS, 60000 GATES, PQFP100
A3PN125-FVQ100 FPGA, 3072 CLBS, 125000 GATES, PQFP100
相關代理商/技術參數
參數描述
A3PE1500-PQG208I 功能描述:IC FPGA 1KB FLASH 1.5M 208-PQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現場可編程門陣列） 系列:ProASIC3E 產品培訓模塊:Three Reasons to Use FPGA's in Industrial Designs Cyclone IV FPGA Family Overview 特色產品:Cyclone? IV FPGAs 標準包裝:60 系列:CYCLONE® IV GX LAB/CLB數:9360 邏輯元件/單元數:149760 RAM 位總計:6635520 輸入/輸出數:270 門數:- 電源電壓:1.16 V ~ 1.24 V 安裝類型:表面貼裝 工作溫度:0°C ~ 85°C 封裝/外殼:484-BGA 供應商設備封裝:484-FBGA（23x23）
A3PE1500-PQG896 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
A3PE1500-PQG896ES 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
A3PE1500-PQG896I 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
A3PE1500-PQG896PP 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:ProASIC3E Flash Family FPGAs
發布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發布成功！您可以繼續發布采購。也可以進入我的后臺，查看報價

發布成功！您可以繼續發布采購。也可以進入我的后臺，查看報價

*型號 *數量 廠商 批號 封裝
添加更多采購

我的聯系方式

*
*
*
主站蜘蛛池模板： 江北区| 图们市| 东乌| 武强县| 潞西市| 茶陵县| 长宁县| 台江县| 罗田县| 休宁县| 芷江| 资源县| 洛浦县| 东兴市| 太白县| 竹溪县| 瓦房店市| 瓮安县| 南投市| 神木县| 铜陵市| 工布江达县| 铁岭县| 德钦县| 精河县| 遂昌县| 纳雍县| 比如县| 保康县| 芦溪县| 南澳县| 营山县| 普格县| 浦城县| 崇明县| 巢湖市| 正定县| 汶川县| 会同县| 东丽区| 错那县|