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參數(shù)資料
| 型號： | AD7679CB1 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 18-Bit, 2.5 LSB INL, 570 kSPS SAR ADC |
| 中文描述： | 18位，2.5 LSB INL和570 kSPS的SAR型ADC |
| 文件頁數(shù)： | 25/28頁 |
| 文件大?。?/td> | 506K |
| 代理商： | AD7679CB1 |
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AD7679
APPLICATION HINTS
Rev. 0 | Page 25 of 28
LAYOUT
The AD7679 has very good immunity to noise on the power
supplies. However, care should still be taken with regard to
grounding layout.
The printed circuit board that houses the AD7679 should be
designed so that the analog and digital sections are separated
and confined to certain areas of the board. This facilitates the
use of ground planes that can be easily separated. Digital and
analog ground planes should be joined in only one place,
preferably underneath the AD7679, or at least as close to the
AD7679 as possible. If the AD7679 is in a system where
multiple devices require analog-to-digital ground connections,
the connection should still be made at one point only, a star
ground point that should be established as close to the AD7679
as possible.
The user should avoid running digital lines under the device, as
these will couple noise onto the die. The analog ground plane
should be allowed to run under the AD7679 to avoid noise
coupling. Fast switching signals like CNVST or clocks should be
shielded with digital ground to avoid radiating noise to other
sections of the board, and should never run near analog signal
paths. Crossover of digital and analog signals should be avoided.
Traces on different but close layers of the board should run at
right angles to each other. This will reduce the effect of
feedthrough through the board. The power supply lines to the
AD7679 should use as large a trace as possible to provide low
impedance paths and reduce the effect of glitches on the power
supply lines. Good decoupling is also important to lower the
supply’s impedance presented to the AD7679 and to reduce the
magnitude of the supply spikes. Decoupling ceramic capacitors,
typically 100 nF, should be placed close to and ideally right up
against each power supply pin (AVDD, DVDD, and OVDD)
and their corresponding ground pins. Additionally, low ESR 10
μF capacitors should be located near the ADC to further reduce
low frequency ripple.
The DVDD supply of the AD7679 can be a separate supply or
can come from the analog supply, AVDD, or the digital interface
supply, OVDD. When the system digital supply is noisy or when
fast switching digital signals are present, and if no separate
supply is available, the user should connect the DVDD digital
supply to the analog supply AVDD through an RC filter, (see
Figure 25), and connect the system supply to the interface
digital supply OVDD and the remaining digital circuitry. When
DVDD is powered from the system supply, it is useful to insert a
bead to further reduce high frequency spikes.
The AD7679 has four different ground pins: REFGND, AGND,
DGND, and OGND. REFGND senses the reference voltage and
should be a low impedance return to the reference because it
carries pulsed currents. AGND is the ground to which most
internal ADC analog signals are referenced. This ground must
be connected with the least resistance to the analog ground
plane. DGND must be tied to the analog or digital ground plane
depending on the configuration. OGND is connected to the
digital system ground.
The layout of the decoupling of the reference voltage is
important. The decoupling capacitor should be close to the
ADC and should be connected with short and large traces to
minimize parasitic inductances.
EVALUATING THE AD7679’S PERFORMANCE
A recommended layout for the AD7679 is outlined in the
documentation of the
EVAL-AD7679CB
evaluation board for
the AD7679. The evaluation board package includes a fully
assembled and tested evaluation board, documentation, and
software for controlling the board from a PC via the
EVAL-
CONTROL BRD2
.
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