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參數資料
| 型號： | AD7721SQ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | CMOS 16-Bit, 468.75 kHz, Sigma-Delta ADC |
| 中文描述： | 1-CH 16-BIT DELTA-SIGMA ADC, SERIAL/PARALLEL ACCESS, CDIP28 |
| 封裝： | CERDIP-28 |
| 文件頁數： | 12/16頁 |
| 文件大小： | 259K |
| 代理商： | AD7721SQ |
AD7721
REV. A
–12–
PARALLE L INT E RFACE
Read Operation
T he device defaults to parallel mode if
CS
,
RD
and
WR
are not
tied to DGND together. Figure 11 shows a timing diagram for
reading from the AD7721 in the parallel mode. When operating
the device in parallel mode,
CS
and
RD
should be tied to
DGND permanently except when control information is being
written to the AD7721.
DRDY
goes high for 2 clock cycles to
indicate that new data is available from the interface. T he
AD7721 outputs this data after the falling edge of
DRDY
. T his
DRDY
pin can be used to drive an edge-triggered interrupt of a
microprocessor.
Write Operation
T he write operation is used to write data into the control regis-
ter. T he outputs of the control register select the analog input
range, allow the part to be put into power-down (standby)
mode, define the function of the DVAL/
SYNC
pin, and initiate
the calibration routine. After power-up and after at least 16
clock cycles, the control register must be written to. A cali-
bration must also be performed at least once after power-up to
set the calibration registers. T he function of each bit in the
control register is shown in T able I. When writing to the con-
trol register, the
RD
pin must be taken high so that the pins D0
to D11 are configured as inputs.
DATA OUT (O)
SCLK (O)
DB0
DB10
DB11
DB12
DB13
DB14
DB15
RFS
(I) /
DRDY
(O)
t
2
t
3
t
4
t
5
t
6
t
8
NOTE: (I) SIGNIFIES AN INPUT; (O) SIGNIFIES AN OUTPUT.
t
1
t
9
t
7
Figure 10. Serial Mode Output Register Read
DRDY
(O)
DB0–DB11 (O)
RD
(I)
CS
(I)
t
12
t
11
NOTE: (I) SIGNIFIES AN INPUT; (O) SIGNIFIES AN OUTPUT.
t
10
Figure 11. Parallel Mode Output Register Read
NOTE: (I) SIGNIFIES AN INPUT; (O) SIGNIFIES AN OUTPUT.
WR
(I)
VALID DATA
CS
(I)
DB0–DB11 (I)
t
14
t
15
t
13
Figure 12. Write Timing Diagram
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