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參數(shù)資料
| 型號： | AD9874BST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | IF Digitizing Subsystem |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP48 |
| 封裝： | PLASTIC, MS-026BBC, LQFP-48 |
| 文件頁數(shù)： | 12/40頁 |
| 文件大小： | 744K |
| 代理商： | AD9874BST |
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REV. 0
–12–
AD9874
SERIAL PERIPHERAL INTERFACE (SPI)
The serial peripheral interface (SPI) is a bidirectional serial port. It is used to load configuration information into the registers listed
below as well as to read back their contents. Table I provides a list of the registers that may be programmed through the SPI port.
Addresses and default values are given in hexadecimal form.
Table I. SPI Address Map
Address Bit
(Hex)
Breakdown
Width
Default Value
Name
Description
POWER CONTROL REGISTERS
0x00
(7:0)
8
0xFF
STBY
Standby Control Bits (REF, LO, CKO, CK, GC, LNAMX, Unused, and ADC)
0x01
(7:6)
(5:4)
(3:2)
(1:0)
2
2
2
2
0
0
0
0
LNAB
MIXB
CKOB
ADCB
LNA Bias Current (0 = 0.5 mA, 1 = 1 mA, 2 = 2 mA, 3 = 3 mA)
Mixer Bias Current (0 = 0.5 mA, 1 = 1.5 mA, 2 = 2.7 mA, 3 = 4 mA)
CK Oscillator Bias (0 = 0.25 mA, 1 = 0.35 mA, 2 = 0.40 mA, 3 = 0.65 mA)
Do Not Use
0x02
(7:0)
8
0x00
TEST
Factory Test Mode. Do not use.
AGC
0x03
(7)
(6:0)
1
7
0
0x00
ATTEN
AGCG(14:8) AGC Attenuation Setting (7 MSBs of a 15-Bit Unsigned Word)
Apply 16 dB Attenuation in the Front End
0x04
(7:0)
8
0x00
AGCG(7:0)
AGC Attenuation Setting (8 LSBs of a 15-Bit Unsigned Word)
Default corresponds to maximum gain
0x05
(7:4)
(3:0)
4
4
0
0
AGCA
AGCD
AGC Attack Bandwidth Setting. Default yields 50 Hz raw loop bandwidth.
AGC Decay Time Setting. Default is decay time = attack time.
0x06
(7)
(6:4)
(3)
(2:0)
1
3
1
3
0
0
0
0
AGCV
AGCO
AGCF
AGCR
Enable Digital VGA to increase AGC Range by 12 dB
AGC Overload Update Setting. Default is slowest update
Fast AGC (Minimizes resistance seen between GCP and GCN)
AGC Enable/Reference Level (Disabled, 3 dB, 6 dB, 9 dB, 12 dB, 15 dB below Clip)
DECIMATION FACTOR
0x07
(7:5)
(4)
(3:0)
3
1
4
Unused
K
M
0
4
Decimation Factor = 60
×
(M + 1), if K = 0; 48
×
(M + 1), if K = 1
Default is Decimate-by-300
LO SYNTHESIZER
0x08
(5:0)
6
0x00
LOR(13:8)
Reference Frequency Divisor (6 MSBs of a 14-Bit Word)
0x09
(7:0)
8
0x38
LOR(7:0)
Reference Frequency Divisor (8 LSBs of a 14-Bit Word)
Default (56) Yields 300 kHz from f
REF
= 16.8 MHz
0x0A
(7:5)
(4:0)
3
5
0x5
0x00
LOA
LOB(12:8)
“A” Counter (Prescaler Control Counter)
“B” Counter MSBs (5 MSBs of a 13-Bit Word)
Default LOA and LOB values yield 300 kHz from 73.35 MHz–2.25 MHz
0x0B
(7:0)
8
0x1D
LOB(7:0)
“B” Counter LSBs (8 LSBs of a 13-Bit Word)
0x0C
(6)
(5)
(4:2)
(1:0)
1
1
3
2
0
0
0
3
LOF
LOINV
LOI
LOTM
Enable Fast Acquire
Invert Charge Pump (0 = Source Current to Increase VCO Frequency)
Charge Pump Current in Normal Operation. I
= (LOI + 1)
×
0.625 mA
Manual Control of LO Charge Pump (0 = Off, 1 = Up, 2 = Down, 3 = Normal)
0x0D
(5:0)
4
0x0
LOFA(13:8)
LO Fast Acquire Time Unit (6 MSBs of a 14-Bit Word)
0x0E
(7:0)
8
0x04
LOFA(7:0)
LO Fast Acquire Time Unit (8 LSBs of a 14-Bit Word)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9874EB | IF Digitizing Subsystem |
| AD9875BSTRL | Broadband Modem Mixed-Signal Front End |
| AD9875 | Broadband Modem Mixed-Signal Front End |
| AD9875-EB | Broadband Modem Mixed-Signal Front End |
| AD9875BST | Broadband Modem Mixed-Signal Front End |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9874EB | 制造商:AD 制造商全稱:Analog Devices 功能描述:IF Digitizing Subsystem |
| AD9874-EB | 制造商:Analog Devices 功能描述: |
| AD9874-EBZ | 功能描述:BOARD EVAL FOR AD9874 制造商:analog devices inc. 系列:- 零件狀態(tài):有效 類型:數(shù)字轉(zhuǎn)換器 頻率:10MHz ~ 300MHz 配套使用產(chǎn)品/相關(guān)產(chǎn)品:AD9874 所含物品:板 標(biāo)準(zhǔn)包裝:1 |
| AD9875 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
| AD9875BST | 制造商:Analog Devices 功能描述:Modem Chip Single 48-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:10B BROADBAND MODEM MXFE CONVERTER - Tape and Reel |
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