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參數(shù)資料
| 型號： | AD9883 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 110 MSPS Analog Interface for Flat Panel Displays |
| 中文描述： | 110 MSPS的模擬接口的平板顯示器 |
| 文件頁數(shù)： | 19/24頁 |
| 文件大小： | 177K |
| 代理商： | AD9883 |
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AD9883
–19–
Table XXVII. Active Hsync Results
Bit 7
(Hsync
Detect)
Bit 1
(SOG
Detect)
Bit 4, Reg
0EH
(Override)
AHS
0
0
1
1
X
0
1
0
1
X
0
0
0
0
1
Bit 3 in 0EH
1
0
Bit 3 in 0EH
Bit 3 in 0EH
AHS = 0 means use the Hsync pin input for Hsync.
AHS = 1 means use the SOG pin input for Hsync.
The override bit is in register 0EH, Bit 4.
5 Detected Hsync Input Polarity Status
This bit reports the status of the Hsync input polarity
detection circuit. It can be used to determine the polarity
of the Hsync input. The detection circuit’s location is
shown in the Sync Processing Block Diagram.
14
Table XXVIII. Detected Hsync Input Polarity Status
Hsync Polarity Status
Result
0
1
Hsync Polarity Is Negative
Hsync Polarity Is Positive
14
4 Vsync Detect
This bit is used to indicate when activity is detected on
the Vsync input pin, (Pin 31). If Vsync is held high or
low, activity will not be detected.
Table XXIX. Vsync Detection Results
Detect
Function
0
1
No Activity Detected
Activity Detected
The Sync Processing Block Diagram shows where this
function is implemented.
3 AVS – Active Vsync
This bit indicates which Vsync source is being used; the
Vsync input or output from the sync separator. Bit 4 in
this register is what determines which is active. If both
Vsync and SOG are detected the user can determine
which has priority via Bit 0 in register 0EH. The user can
override this function via Bit 1 in register 0EH. If the
override bit is set to Logic 1, then this bit will be forced to
whatever the state of Bit 0 in register 0EH is set to.
14
Table XXX. Active Vsync Results
Bit 5
(Vsync Detect)
Override
AVS
0
1
X
0
0
1
0
1
Bit 0 in 0EH
AVS = 0 means Sync separator.
AVS = 1 means Vsync input.
The override bit is in register 0EH, Bit 1.
2
Detected Vsync Output Polarity Status
This bit reports the status of the Vsync output polarity
detection circuit. It can be used to determine the polarity
of the Vsync output. The detection circuit’s location is
shown in the Sync Processing Block Diagram.
14
Table XXXI. Detected Vsync Output Polarity Status
Vsync Polarity Status
Result
0
1
Vsync Polarity Is Active High
Vsync Polarity Is Active Low
14
1
This bit is used to indicate when sync activity is detected
on the sync-on-green input pin, (Pin 49).
Sync-on-Green Detect
Table XXXII. Sync-on-Green Detection Results
Detect
Function
0
1
No Activity Detected
Activity Detected
The sync processing block diagram shows where this
function is implemented.
0
Detected COAST Polarity Status
This bit reports the status of the coast input polarity
detection circuit. It can be used to determine the polarity
of the coast input. The detection circuit’s location is shown
in the Sync Processing Block Diagram.
14
Table XXXIII. Detected Coast Input Polarity Status
Hsync Polarity Status
Result
0
1
Coast Polarity Is Negative
Coast Polarity Is Positive
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相關代理商/技術參數(shù) |
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| AD9883/PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:110 MSPS Analog Interface for Flat Panel Displays |
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| AD9883A/PCB | 制造商:Analog Devices 功能描述:110MHZ ANALOG INTERFACE FOR SG |
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