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參數(shù)資料
| 型號： | AD9883A |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 110 MSPS/140 MSPS Analog Interface for Flat Panel Displays |
| 中文描述： | 110 MSPS/140 MSPS的模擬接口的平板顯示器 |
| 文件頁數(shù)： | 16/28頁 |
| 文件大?。?/td> | 229K |
| 代理商： | AD9883A |
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REV. B
AD9883A
–16–
Table VI. Control Register Map (continued)
Write and
Read or
Read Only
Hex
Address
Default
Value
Register
Name
Bits
Function
0FH
R/W
7:1
0
*******
Bit 7 – Clamp Function. Chooses between Hsync for Clamp
signal or another external signal to be used for clamping.
(Logic 0 = Hsync, Logic 1 = Clamp.)
Bit 6 – Clamp Polarity. Valid only with external Clamp signal.
(Logic 0 = Active High, Logic 1 Selects Active Low.)
Bit 5 – Coast Select. Logic 0 selects the coast input pins to be
used for the PLL coast. Logic 1 selects Vsync to be used for the
PLL coast.
Bit 4 – Coast Polarity Override. (Logic 0 = Polarity determined by
chip, Logic 1 = Polarity set by Bit 3 in register 0FH.)
Bit 3 – Coast Polarity. Selects polarity of external Coast signal.
(Logic 0 = Active Low, Logic 1 = Active High.)
Bit 2 – Seek Mode Override. (Logic 1 = Allow Low Power Mode,
Logic 0 = Disallow Low Power Mode.)
Bit 1 – PWRDN. Full Chip Power-Down, Active Low. (Logic 0 =
Full Chip Power-Down, Logic 1 = Normal.)
*
1
******
**
0
*****
***
0
****
****
1
***
*****
1
**
******
1
*
10H
R/W
7:3
10111
***
Sync-on-Green
Threshold
Sync-on-Green Threshold. Sets the voltage level of the Sync-on-
Green slicer’s comparator.
Bit 2 – Red Clamp Select. Logic 0 selects clamp to ground.
Logic 1 selects clamp to midscale (voltage at Pin 37).
Bit 1 – Green Clamp Select. Logic 0 selects clamp to ground.
Logic 1 selects clamp to midscale (voltage at Pin 37).
Bit 0 – Blue Clamp Select. Logic 0 selects clamp to ground.
Logic 1 selects clamp to midscale (voltage at Pin 37).
*****
0
**
******
0
*
*******
0
11H
R/W
7:0
00100000
Sync Separator
Threshold
Sync Separator Threshold. Sets how many internal 5 MHz clock
periods the sync separator will count to before toggling high or low.
This should be set to some number greater than the maximum
Hsync or equalization pulsewidth.
12H
R/W
7:0
00000000
Pre-Coast
Pre-Coast. Sets the number of Hsync periods that Coast becomes
active prior to Vsync.
13H
R/W
7:0
00000000
Post-Coast
Post-Coast. Sets the number of Hsync periods that Coast stays
active following Vsync.
14H
RO
7:0
Sync Detect
Bit 7 – Hsync detect. It is set to Logic 1 if Hsync is present on the
analog interface; otherwise it is set to Logic 0.
Bit 6 – AHS: Active Hsync. This bit indicates which analog Hsync
is being used. (Logic 0 = Hsync Input Pin, Logic 1 = Hsync from
Sync-on-Green.)
Bit 5 – Input Hsync Polarity Detect. (Logic 0 = Active Low,
Logic 1 = Active High.)
Bit 4 – Vsync Detect. It is set to Logic 1 if Vsync is present on the
analog interface; otherwise it is set to Logic 0.
Bit 3 – AVS: Active Vsync. This bit indicates which analog Vsync
is being used. (Logic 0 = Vsync Input Pin, Logic 1 = Vsync from
Sync Separator.)
Bit 2 – Output Vsync Polarity Detect. (Logic 0 = Active Low,
Logic 1 = Active High.)
Bit 1 – Sync-on-Green Detect. It is set to Logic 1 if sync is present
on the Green video input; otherwise it is set to 0.
Bit 0 – Input Coast Polarity Detect. (Logic 0 = Active Low, Logic 1 =
Active High.)
15H
R/
W
7:0
1111
****
****
1
***
*****
1
**
******
1
*
Test Register
Bits [7:4] Reserved for future use.
Bit 3 – Must be set to 1 for proper operation.
Bit 2 – Must be set to 1 for proper operation.
Bit 1 – 4:2:2 Output Formatting Mode (Logic 0 = 4:2:2 mode, Logic 1=
4:4:4 mode)
Bit 0 – Must be set to 0 for proper operation.
*******
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9883ABST-RL110 | 110 MSPS/140 MSPS Analog Interface for Flat Panel Displays |
| AD9883ABST-110 | 110 MSPS/140 MSPS Analog Interface for Flat Panel Displays |
| AD9883ABST-140 | 110 MSPS/140 MSPS Analog Interface for Flat Panel Displays |
| AD9883AKSTZ-110 | 110 MSPS/140 MSPS Analog Interface for Flat Panel Displays |
| AD9883AKSTZ-140 | 110 MSPS/140 MSPS Analog Interface for Flat Panel Displays |
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| AD9883A/PCB | 制造商:Analog Devices 功能描述:110MHZ ANALOG INTERFACE FOR SG |
| AD9883ABST-100 | 制造商:Analog Devices 功能描述:110MHZ ANALOG INTERFACE FOR SGA FPD - Bulk |
| AD9883ABST-110 | 制造商:Analog Devices 功能描述:ADC Triple 110Msps 8-bit Parallel 80-Pin LQFP |
| AD9883ABST-140 | 制造商:Analog Devices 功能描述:ADC Triple 140Msps 8-bit Parallel 80-Pin LQFP |
| AD9883ABST-RL110 | 制造商:Analog Devices 功能描述:ADC Triple 110Msps 8-bit Parallel 80-Pin LQFP T/R |
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