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參數(shù)資料
| 型號： | AD9957BSVZ-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡 |
| 英文描述： | 1 GSPS Quadrature Digital Upconverter with 18-Bit IQ Data Path and 14-Bit DAC |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP100 |
| 封裝： | ROHS COMPLIANT, MS-026AED-HD, TQFP-100 |
| 文件頁數(shù)： | 55/60頁 |
| 文件大小： | 840K |
| 代理商： | AD9957BSVZ-REEL |
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AD9957
PROFILE REGISTERS
There are eight consecutive serial I/O addresses (0x0E to 0x15)
dedicated to device profiles. All eight profile registers are either
single tone profiles or QDUC profiles depending on the device
operating mode specified by CFR1 Bits<25:24>. During
operation, the active profile register is determined via the
external PROFILE<2:0> pins.
Single tone profiles control: DDS frequency (32 bits), DDS
phase offset (16 bits), and DDS amplitude scaling (14 bits).
Rev. 0 | Page 55 of 60
QDUC profiles control: DDS frequency (32 bits), DDS phase
offset (16 bits), output amplitude scaling (8 bits), CCI filter
interpolation factor, inverse CCI bypass, and spectral invert.
The QDUC profiles also selectively apply to the interpolating
DAC operating mode: only output scaling, CCI filter
interpolation factor, and inverse CCI bypass apply; all others
(DDS frequency, output amplitude scaling, and spectral invert)
are ignored.
Profile<0:7> Register—Single
T
one
Address 0x0E to 0x15, eight bytes are assigned to this register.
Table 27. Bit Descriptions for Profile<0:7> Registers—Single Tone
Bits
Mnemonic
63:62
Not Available
61:48
Amplitude Scale Factor
47:32
Phase Offset Word
31:0
Frequency Tuning Word
Description
This 14-bit number controls the DDS output amplitude.
This 16-bit number controls the DDS phase offset.
This 32-bit number controls the DDS frequency.
Profile<0:7> Register—QDUC
Address 0x0E to 0x15, eight bytes are assigned to this register.
Table 28. Bit Descriptions for Profile<0:7> Registers—QDUC
Bits
Mnemonic
63:58
CC Interpolation Rate
57
Spectral Invert
Description
This 6-bit number is the rate interpolation factor for the CCI filter.
0: The modulator output takes the form: I(t) × cos(
ct) – Q(t) × sin(
ct).
1: The modulator output takes the form: I(t) × cos(
ct) + Q(t) × sin(
ct).
0: The inverse CCI filter is enabled.
1: The inverse CCI filter is bypassed.
This 8-bit number controls the output amplitude.
This 16-bit number controls the DDS phase offset.
This 32-bit number controls the DDS frequency.
56
Inverse CCI Bypass
55:48
47:32
31:0
Output Scale Factor
Phase Offset Word
Frequency Tuning Word
RAM Register
Address 0x16, four bytes are assigned to this register.
Table 29. Bit Descriptions for RAM Register
Bits
Mnemonic
31:0
RAM Word
Description
The number of 32-bit words written to RAM is defined by the start and end address in
RAM Segment Register 0 or RAM Segment Register 1.
GPIO Config Register
Address 0x18, one byte is assigned to this register.
Table 30. Bit Descriptions for GPIO Config Register
Bits
Mnemonic
15:0
Configuration Bits
Description
See the General-Purpose I/O (GPIO) Port section for details; default is 0x0000.
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相關代理商/技術參數(shù) |
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| AD9957BSVZREEL13 | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 GSPS Quadrature Digital Upconverter w/18-Bit IQ Data Path and 14-Bit DAC |
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| AD9958 PCB | 制造商:Analog Devices 功能描述:EVAL BOARD ((NS)) |
| AD9958/PCB | 制造商:Analog Devices 功能描述:Evaluation Board For 2-Channel 500 MSPS DDS With 10-Bit DACs 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Analog Devices 功能描述:IC 10-BIT DAC DDS |
| AD9958/PCBZ | 功能描述:BOARD EVALUATION FOR AD9958 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:AgileRF™ 標準包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
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