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參數(shù)資料
| 型號： | AD9995KCPRL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | 12-Bit CCD Signal Processor with Precision Timing ⑩ Generator |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, QCC56 |
| 封裝： | 8 X 8 MM, MO-220-VLLD-2, LFCSP-56 |
| 文件頁數(shù)： | 53/60頁 |
| 文件大小： | 1593K |
| 代理商： | AD9995KCPRL |
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AD9995
–53–
Table XLIV. V-Sequence 7 (VSEQ7) Register Map
Data Bit Default
Address Content
B8
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register Name
HBLKMASK_7
CLPOBPOL_7
PBLKPOL_7
VPATSEL_7
VMASK_7
HBLKALT_7
UNUSED
VPATREPO_7
VPATREPE_7
VPATSTART_7
HDLEN_7
PBLKTOG1_7
PBLKTOG2_7
HBLKTOG1_7
HBLKTOG2_7
HBLKTOG3_7
HBLKTOG4_7
HBLKTOG5_7
HBLKTOG6_7
CLPOBTOG1_7
CLPOBTOG2_7
Description
Masking Polarity during HBLK. H1 [0]. H3 [1].
CLPOB Start Polarity
PBLK Start Polarity
Selected V-Pattern Group for V-Sequence 7
Enable Masking of V-Outputs (Specified by FREEZE/RESUME Registers)
Enable HBLK Alternation
Unused
Number of Selected V-Pattern Group Repetitions for Odd Lines
Number of Selected V-Pattern Group Repetitions for Even Lines
Start Position in the Line for the Selected V-Pattern Group
HD Line Length (Number of Pixels) for V-Sequence 7
PBLK Toggle Position 1 for V-Sequence 7
PBLK Toggle Position 2 for V-Sequence 7
HBLK Toggle Position 1 for V-Sequence 7
HBLK Toggle Position 2 for V-Sequence 7
HBLK Toggle Position 3 for V-Sequence 7
HBLK Toggle Position 4 for V-Sequence 7
HBLK Toggle Position 5 for V-Sequence 7
HBLK Toggle Position 6 for V-Sequence 7
CLPOB Toggle Position 1 for V-Sequence 7
CLPOB Toggle Position 2 for V-Sequence 7
[1:0]
[2]
[3]
[7:4]
[9:8]
[11:10]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
B9
BA
BB
BC
BD
BE
BF
Table XLV. V-Sequence 8 (VSEQ8) Register Map
Data Bit Default
Address Content
C0
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register Name
HBLKMASK_8
CLPOBPOL_8
PBLKPOL_8
VPATSEL_8
VMASK_8
HBLKALT_8
UNUSED
VPATREPO_8
VPATREPE_8
VPATSTART_8
HDLEN_8
PBLKTOG1_8
PBLKTOG2_8
HBLKTOG1_8
HBLKTOG2_8
HBLKTOG3_8
HBLKTOG4_8
HBLKTOG5_8
HBLKTOG6_8
CLPOBTOG1_8
CLPOBTOG2_8
Description
Masking Polarity during HBLK. H1 [0]. H3 [1].
CLPOB Start Polarity
PBLK Start Polarity
Selected V-Pattern Group for V-Sequence 8
Enable Masking of V-Outputs (Specified by FREEZE/RESUME Registers)
Enable HBLK Alternation
Unused
Number of Selected V-Pattern Group Repetitions for Odd Lines
Number of Selected V-Pattern Group Repetitions for Even Lines
Start Position in the Line for the Selected V-Pattern Group
HD Line Length (Number of Pixels) for V-Sequence 8
PBLK Toggle Position 1 for V-Sequence 8
PBLK Toggle Position 2 for V-Sequence 8
HBLK Toggle Position 1 for V-Sequence 8
HBLK Toggle Position 2 for V-Sequence 8
HBLK Toggle Position 3 for V-Sequence 8
HBLK Toggle Position 4 for V-Sequence 8
HBLK Toggle Position 5 for V-Sequence 8
HBLK Toggle Position 6 for V-Sequence 8
CLPOB Toggle Position 1 for V-Sequence 8
CLPOB Toggle Position 2 for V-Sequence 8
[1:0]
[2]
[3]
[7:4]
[9:8]
[11:10]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
[11:0]
[23:12]
C1
C2
C3
C4
C5
C6
C7
REV. 0
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相關代理商/技術參數(shù) |
參數(shù)描述 |
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| AD9995KCPZ | 功能描述:IC CCD SIGNAL PROCESSOR 56-LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關文件:Automotive Product Guide 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:20-TSSOP 包裝:管件 |
| AD9995KCPZRL | 功能描述:IC CCD SIGNAL PROCESSOR 56-LFCSP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關文件:Automotive Product Guide 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:20-TSSOP 包裝:管件 |
| AD9995KCPZRL7 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD9996BBCZ | 制造商:Rochester Electronics LLC 功能描述:14B 40 MSPS AFETG CONVERTER - Bulk |
| AD9996BBCZRL | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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