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| 型號(hào)： | ADSP-2186L |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection |
| 中文描述： | 無(wú)電容，NMOS管，150mA的低壓差穩(wěn)壓器的反向電流保護(hù) |
| 文件頁(yè)數(shù)： | 1/34頁(yè) |
| 文件大小： | 256K |
| 代理商： | ADSP-2186L |
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REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
ADSP-2186L
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2000
DSP Microcomputer
FUNCTIONAL BLOCK DIAGRAM
TIMER
GENERATORS
DAG 2
DAG 1
SERIAL PORTS
SPORT 1
SPORT 0
8K 16
DATA
MEMORY
8K 24
PROGRAM
MEMORY
DATA MEMORY DATA
DATA MEMORY ADDRESS
PROGRI/O
FAND
CBYTE DMA
MEMORY
ADSP-2100 BASE
ARCHITECTURE
SHIFTER
MAC
ALU
ARITHMETIC UNITS
PCONTROL
PROGRAM
PROGRAM MEMORY ADDRESS
PROGRAM MEMORY DATA
EXDATA
BUS
EXTERNAL
ADBUS
INTERNAL
DMA
PORT
EXTERNAL
BUS
OR
FUL MODE
HOST MODE
FEATURES
PERFORMANCE
25 ns Instruction Cycle Time 40 MIPS Sustained
Performance
Single-Cycle Instruction Execution
Single-Cycle Context Switch
3-Bus Architecture Allows Dual Operand Fetches in
Every Instruction Cycle
Multifunction Instructions
Power-Down Mode Featuring Low CMOS Standby
Power Dissipation with 400 Cycle Recovery from
Power-Down Condition
Low Power Dissipation in Idle Mode
INTEGRATION
ADSP-2100 Family Code Compatible, with Instruction
Set Extensions
40K Bytes of On-Chip RAM, Configured as
8K Words On-Chip Program Memory RAM and
8K Words On-Chip Data Memory RAM
Dual Purpose Program Memory for Both Instruction
and Data Storage
Independent ALU, Multiplier/Accumulator and Barrel
Shifter Computational Units
Two Independent Data Address Generators
Powerful Program Sequencer Provides
Zero Overhead Looping Conditional Instruction
Execution
Programmable 16-Bit Interval Timer with Prescaler
100-Lead LQFP
144-Ball Mini-BGA
SYSTEM INTERFACE
16-Bit Internal DMA Port for High Speed Access to
On-Chip Memory (Mode Selectable)
4 MByte Byte Memory Interface for Storage of Data
Tables and Program Overlays
8-Bit DMA to Byte Memory for Transparent Program
and Data Memory Transfers (Mode Selectable)
I/O Memory Interface with 2048 Locations Supports
Parallel Peripherals (Mode Selectable)
Programmable Memory Strobe and Separate I/O Memory
Space Permits “Glueless” System Design
(Mode Selectable)
Programmable Wait State Generation
Two Double-Buffered Serial Ports with Companding
Hardware and Automatic Data Buffering
Automatic Booting of On-Chip Program Memory from
Byte-Wide External Memory, e.g., EPROM, or
Through Internal DMA Port
Six External Interrupts
13 Programmable Flag Pins Provide Flexible System
Signaling
UART Emulation through Software SPORT Reconfiguration
ICE-Port Emulator Interface Supports Debugging
in Final Systems
GENERAL NOTE
This data sheet represents production grade specifications for
the ADSP-2186L (3.3 V) processor.
GENERAL DESCRIPTION
The ADSP-2186L is a single-chip microcomputer optimized for
digital signal processing (DSP) and other high speed numeric
processing applications.
The ADSP-2186L combines the ADSP-2100 family base archi-
tecture (three computational units, data address generators and
a program sequencer) with two serial ports, a 16-bit internal
DMA port, a byte DMA port, a programmable timer, Flag I/O,
extensive interrupt capabilities and on-chip program and data
memory.
The ADSP-2186L integrates 40K bytes of on-chip memory
configured as 8K words (24-bit) of program RAM and 8K
words (16-bit) of data RAM. Power-down circuitry is also pro-
vided to meet the low power needs of battery operated portable
equipment. The ADSP-2186L is available in a 100-lead LQFP
and 144-ball mini-BGA packages.
In addition, the ADSP-2186L supports new instructions, which
include bit manipulations—bit set, bit clear, bit toggle, bit test—
new ALU constants, new multiplication instruction (x squared),
biased rounding, result free ALU operations, I/O memory trans-
fers and global interrupt masking for increased flexibility.
ICE-Port is a trademark of Analog Devices, Inc.
All other trademarks are the property of their respective holders.
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相關(guān)代理商/技術(shù)參數(shù) |
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| ADSP-2186L1111 | 制造商:AD 制造商全稱:Analog Devices 功能描述:DSP Microcomputer |
| ADSP-2186LBCA-160 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 40MHz 40MIPS 144-Pin CSP-BGA 制造商:Rochester Electronics LLC 功能描述:8K/8K 16 BIT DSP 40 MIPS 3.3V MINI BGA - Bulk |
| ADSP2186LBCA-160 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ADSP-2186LBCA-160R | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 40MHz 40MIPS 144-Pin CSP-BGA T/R |
| ADSP-2186LBCA-160R3 | 制造商:AD 制造商全稱:Analog Devices 功能描述:DSP Microcomputer |
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