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參數資料
| 型號： | ADSP-2186L |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | Cap-Free, NMOS, 150mA Low Dropout Regulator with Reverse Current Protection |
| 中文描述： | 無電容，NMOS管，150mA的低壓差穩壓器的反向電流保護 |
| 文件頁數： | 2/34頁 |
| 文件大小： | 256K |
| 代理商： | ADSP-2186L |
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ADSP-2186L
–2–
REV. A
Fabricated in a high speed, double metal, low power, CMOS
process, the ADSP-2186L operates with a 25 ns instruction cycle
time. Every instruction can execute in a single processor cycle.
The ADSP-21xx family DSPs contain a shadow bank register
that is useful for single cycle context switching of the processor.
The ADSP-2186L’s flexible architecture and comprehensive
instruction set allow the processor to perform multiple opera-
tions in parallel. In one processor cycle the ADSP-2186L can:
Generate the next program address
Fetch the next instruction
Perform one or two data moves
Update one or two data address pointers
Perform a computational operation
This takes place while the processor continues to:
Receive and transmit data through the two serial ports
Receive and/or transmit data through the internal DMA port
Receive and/or transmit data through the byte DMA port
Decrement timer
Development System
The ADSP-2100 Family Development Software, a complete set
of tools for software and hardware system development, sup-
ports the ADSP-2186L. The System Builder provides a high
level method for defining the architecture of systems under
development. The Assembler has an algebraic syntax that is easy
to program and debug. The Linker combines object files into an
executable file. The Simulator provides an interactive instruction-
level simulation with a reconfigurable user interface to display
different portions of the hardware environment. A PROM
Splitter generates PROM programmer compatible files. The
C Compiler, based on the Free Software Foundation’s GNU
C Compiler, generates ADSP-2186L assembly source code.
The source code debugger allows programs to be corrected in
the C environment. The Runtime Library includes over 100
ANSI-standard mathematical and DSP-specific functions.
The EZ-KIT Lite is a hardware/software kit offering a complete
development environment for the entire ADSP-21xx family: an
ADSP-218x based evaluation board with PC monitor software
plus Assembler, Linker, Simulator and PROM Splitter software.
The ADSP-21xx EZ-KIT Lite is a low cost, easy to use hardware
platform on which you can quickly get started with your DSP soft-
ware design. The EZ-KIT Lite includes the following features:
33 MHz ADSP-2181
Full 16-bit Stereo Audio I/O with AD1847 SoundPort
Codec
RS-232 Interface to PC with Windows
3.1 Control Software
EZ-ICE
Connector for Emulator Control
DSP Demo Programs
Code compatible with all 218x products
The ADSP-218x EZ-ICE
Emulator aids in the hardware debug-
ging of an ADSP-2186L system. The emulator consists of hard-
ware, host computer resident software, and the target board
connector. The ADSP-2186L integrates on-chip emulation
support with a 14-pin ICE-Port interface. This interface provides a
simpler target board connection that requires fewer mechanical
clearance considerations than other ADSP-2100 Family EZ-ICEs.
The ADSP-2186L device need not be removed from the target
system when using the EZ-ICE, nor are any adapters needed. Due
to the small footprint of the EZ-ICE connector, emulation can
be supported in final board designs.
The EZ-ICE
performs a full range of functions, including:
In-target operation
Up to 20 breakpoints
Single-step or full-speed operation
Registers and memory values can be examined and altered
PC upload and download functions
Instruction-level emulation of program booting and execution
Complete assembly and disassembly of instructions
C source-level debugging
See Designing An EZ-ICE-Compatible Target System in the
ADSP-2100 Family EZ-Tools Manual
(ADSP-2181 sections), as
well as the Target Board Connector for EZ-ICE
Probe section
of this data sheet, for the exact specifications of the EZ-ICE
target board connector.
Additional Information
This data sheet provides a general overview of ADSP-2186L
functionality. For additional information on the architecture and
instruction set of the processor, refer to the
ADSP-2100 Family
User’s Manual
,
Third Edition
. For more information about the
development tools, refer to the
ADSP-2100 Family Development
Tools Data Sheet
.
ARCHITECTURE OVERVIEW
The ADSP-2186L instruction set provides flexible data moves
and multifunction (one or two data moves with a computation)
instructions. Every instruction can be executed in a single pro-
cessor cycle. The ADSP-2186L assembly language uses an alge-
braic syntax for ease of coding and readability. A comprehensive
set of development tools supports program development.
TIMER
DATA ADDRESS
GENERATORS
DAG 2
DAG 1
SERIAL PORTS
SPORT 1
SPORT 0
8DATA
MEMORY
MEMORY
DATA MEMORY DATA
DATA MEMORY ADDRESS
PROGRAMMABLE
FI/O
CBYTE DMA
MEMORY
ADSP-2100 BASE
ARCHITECTURE
SHIFTER
MAC
ALU
ARITHMETIC UNITS
POWER-DOWN
CONTROL
PROGRAM
PROGRAM MEMORY ADDRESS
PROGRAM MEMORY DATA
EXDATA
BUS
ADDRESS
BUS
INTERNAL
DMA
EXDATA
BUS
OR
FUL MODE
HOST MODE
Figure 1. Block Diagram
Figure 1 is an overall block diagram of the ADSP-2186L. The
processor contains three independent computational units: the
ALU, the multiplier/accumulator (MAC) and the shifter. The
computational units process 16-bit data directly and have provi-
sions to support multiprecision computations. The ALU per-
forms a standard set of arithmetic and logic operations; division
primitives are also supported. The MAC performs single-cycle
multiply, multiply/add and multiply/subtract operations with
40 bits of accumulation. The shifter performs logical and arith-
metic shifts, normalization, denormalization and derive expo-
nent operations.
The shifter can be used to efficiently implement numeric
format control including multiword and block floating-point
representations.
SoundPort and EZ-ICE are registered trademarks of Analog Devices, Inc.
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