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參數(shù)資料
型號: ADUC814
廠商: Analog Devices, Inc.
英文描述: MicroConverter, Small Package 12-Bit ADC with Embedded Flash MCU
中文描述: MicroConverter的,小包裝12位ADC,嵌入式閃存MCU
文件頁數(shù): 24/72頁
文件大小: 846K
代理商: ADUC814
ADuC814
ADCCON3 (ADC CONTROL SFR 3)
The ADCCON3 register controls the operation of various calibration modes as well as giving an indication of ADC busy status.
SFR Address
F5H
SFR Power-On Default
00H
Rev. A | Page 24 of 72
BUSY
GNCLD
AVGS1
AVGS0
OFCLD
MODCAL
TYPECAL
SCAL
Table 8. ADCCON3 SFR Bit Designations
Bit No.
Name
7
BUSY
Description
ADC Busy Status Bit.
BUSY is a read-only status bit that is set during a valid ADC conversion or calibration cycle.
Busy is automatically cleared by the core at the end of a conversion or calibration cycle.
Gain Calibration Disable Bit.
This bit enables/disables the gain calibration coefficients from affecting the ADC results.
Set to 0 to enable gain calibration coefficient
Set to 1 to disable gain calibration coefficient.
Number of Averages Selection Bits.
This bit selects the number of ADC readings averaged for each bit decision during a calibration cycle.
AVGS1
AVGS0
Number of Averages
0
0
15
0
1
1
1
0
31
1
1
63
Offset Calibration Disable Bit.
This bit enables/disables the offset calibration coefficients from affecting the ADC results.
Set to 0 to enable offset calibration coefficient.
Set to 1 to disable the offset calibration coefficient
Calibration Mode Select Bit.
This bit should be set to 1 for all calibration cycles.
Calibration Type Select Bit.
This bit selects between offset (zero-scale) and gain (full-scale) calibration.
Set to 0 for offset calibration.
Set to 1 for gain calibration.
Start Calibration Cycle Bit.
When set, this bit starts the selected calibration cycle.
It is automatically cleared when the calibration cycle is completed.
6
GNCLD
5
4
AVGS1
AVGS0
3
OFCLD
2
MODCAL
1
TYPECAL
0
SCAL
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