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參數(shù)資料
| 型號(hào)： | ADUC814 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | MicroConverter, Small Package 12-Bit ADC with Embedded Flash MCU |
| 中文描述： | MicroConverter的，小包裝12位ADC，嵌入式閃存MCU |
| 文件頁(yè)數(shù)： | 44/72頁(yè) |
| 文件大小： | 846K |
| 代理商： | ADUC814 |
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ADuC814
SERIAL PERIPHERAL INTERFACE
The ADuC814 integrates a complete hardware serial peripheral
interface (SPI) on-chip. SPI is an industry-standard synchronous
serial interface that allows eight bits of data to be synchronously
transmitted and received simultaneously, i.e., full duplex. Note
that the SPI pins MISO and MOSI are multiplexed with digital
outputs P3.6 and P3.7. These pins are controlled via the CFG814.0
bit in the CFG814 SFR (Table 17), which configures the relevant
Port 3 pins for normal operation or serial port operation. When
the relevant Port 3 pins are configured for serial interface operation
via the CFG814 SFR, the SPE bit in the SPICON SFR configures
SPI or I
2
C operation (see SPE bit description in Table 18). SPI
can be configured for master or slave operation, and typically
consists of four pins described next.
MISO (Master In, Slave Out Data I/O Pin)
The MISO pin (Pin 23) is configured as an input line in master
mode and as an output line in slave mode. The MISO line on
the master (data in) should be connected to the MISO line in
the slave device (data out). The data is transferred as byte-wide
(8-bit) serial data, MSB first.
MOSI (Master Out, Slave In Pin)
The MOSI pin (Pin 24) is configured as an output line in master
mode and as an input line in slave mode. The MOSI line on the
master (data out) should be connected to the MOSI line in the
slave device (data in). The data is transferred as byte-wide (8-bit)
serial data, MSB first.
SCLOCK (Serial Clock I/O Pin)
The SCLOCK pin (Pin 25) is used to synchronize the data being
transmitted and received through the MOSI and MISO data
lines. A single data bit is transmitted and received in each
SCLOCK period. Therefore, a byte is transmitted/received after
Rev. A | Page 44 of 72
eight SCLOCK periods. The SCLOCK pin is configured as an
output in master mode and as an input in slave mode.
In master mode, the bit rate, polarity, and phase of the clock are
controlled by the CPOL, CPHA, SPR0, and SPR1 bits in the
SPICON SFR (see Table 18). In slave mode, the SPICON register
must be configured with the phase and polarity (CPHA and
CPOL) of the expected input clock. In both master and slave
modes, the data is transmitted on one edge of the SCLOCK
signal and sampled on the other. It is important, therefore, that
the CPHA and CPOL are configured the same for the master
and slave devices.
SS (Slave Select Input Pin)
The SS input pin (Pin 22) is used only when the ADuC814 is
configured in slave mode to enable the SPI peripheral. This line
is active low. Data is received or transmitted in slave mode only
when the SS pin is low, allowing the ADuC814 to be used in
single master, multislave SPI configurations. If CPHA = 1, then
the SS input may be permanently pulled low. With CPHA = 0,
the SS input must be driven low before the first bit in a byte-
wide transmission or reception and return high again after the
last bit in that byte-wide transmission or reception. In SPI slave
mode, the logic level on the external SS pin can be read via the
SPR0 bit in the SPICON SFR.
The following SFR registers are used to control the SPI interface.
SPICON
SFR Address
Power-On Default
Bit Addressable
SPI Control Register
F8H
04H
Yes
ISPI
WCOL
SPE
SPM
CPOL
CPHA
SPR1
SPR0
Table 18. SPICON SFR Bit Designations
Bit No.
Name
7
ISPI
Description
SPI Interrupt Bit.
Set by the MicroConverter at the end of each SPI transfer.
Cleared directly by the user code or indirectly by reading the SPIDAT SFR.
Write Collision Error Bit.
Set by the MicroConverter if SPIDAT is written to while an SPI transfer is in progress.
Cleared by the user.
SPI Interface Enable Bit.
Set by the user to enable the SPI interface.
Cleared by the user to enable the I
2
C interface.
SPI Master/Slave Mode Select Bit.
Set by the user to enable master mode operation (SCLOCK is an output).
Cleared by the user to enable slave mode operation (SCLOCK is an input).
Clock Polarity Select Bit.
Set by the user if SCLOCK idles high. Cleared by the user if SCLOCK idles low.
6
WCOL
5
SPE
4
SPIM
3
CPOL
1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADUC814_02 | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:MicroConverter, Small Package 12-Bit ADC with Embedded FLASH MCU |
| ADUC814AN | 功能描述:8052 MicroConverter? ADuC8xx Microcontroller IC 8-Bit 16.78MHz 8KB (8K x 8) FLASH 制造商:analog devices inc. 系列:MicroConverter? ADuC8xx 包裝:- 零件狀態(tài):上次購(gòu)買(mǎi)時(shí)間 核心處理器:8052 核心尺寸:8-位 速度:16.78MHz 連接性:I2C，SPI，UART/USART 外設(shè):POR，PSM，溫度傳感器，WDT I/O 數(shù):- 程序存儲(chǔ)容量:8KB（8K x 8） 程序存儲(chǔ)器類(lèi)型:閃存 EEPROM 容量:640 x 8 RAM 容量:256 x 8 電壓 - 電源（Vcc/Vdd）:2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:* 振蕩器類(lèi)型:內(nèi)部 工作溫度:* 封裝/外殼:- 供應(yīng)商器件封裝:- 標(biāo)準(zhǔn)包裝:1 |
| ADUC814ARU | 功能描述:IC ADC 12BIT W/FLASH MCU 28TSSOP RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC8xx 標(biāo)準(zhǔn)包裝:38 系列:Encore!® XP® 核心處理器:eZ8 芯體尺寸:8-位 速度:5MHz 連通性:IrDA，UART/USART 外圍設(shè)備:欠壓檢測(cè)/復(fù)位，LED，POR，PWM，WDT 輸入/輸出數(shù):16 程序存儲(chǔ)器容量:4KB（4K x 8） 程序存儲(chǔ)器類(lèi)型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 105°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:管件 其它名稱(chēng):269-4116Z8F0413SH005EG-ND |
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| ADUC814ARU-REEL | 制造商:Analog Devices 功能描述:MCU 8-Bit ADuC8xx 8052 CISC 8KB Flash 3V/5V 28-Pin TSSOP T/R 制造商:Analog Devices 功能描述:12 BIT ADC WITH EMBEDDED 8-BIT MICRO I.C - Tape and Reel |
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