
ADV601
–43–
REV. 0
Multiplexed Philips Video Timing
The diagrams in this section show transfer timing for pixel (YCrCb) data in Multiplexed Philips video mode. For line (horizontal)
and frame (vertical) data transfer timing, see the Gray Scale/Philips Video Timing section. All output values assume a maximum pin
loading of 50 pF. Note that in timing diagrams for Multiplexed Philips video, the label CTRL indicates the VSYNC, HSYNC and
FIELD pins. Also note that for Multiplexed Philips mode the CREF pin is unused.
Table XXIX. Multiplexed Philips Video—Decode and Master Pixel (YCrCb) Timing Parameters
Parameter
Description
Min
Max
Unit
t
VDATA_DMM_D
t
VDATA_DMM_OH
t
CTRL_DMM_D
t
CTRL_DMM_OH
VDATA Bus, Decode Master Multiplexed Philips, Delay
VDATA Bus, Decode Master Multiplexed Philips, Output Hold
CTRL Signals, Decode Master Multiplexed Philips, Delay
CTRL Signals, Decode Master Multiplexed Philips, Output Hold
N/A
2
N/A
3
14
N/A
11
N/A
ns
ns
ns
ns
(O) CTRL
(O) VCLKO
t
CTRL_DMM_OH
(O) VDATA
t
VDATA_DMM_OH
t
VDATA_DMM_D
VALID
VALID
VALID
t
CTRL_DMM_D
VALID
VALID
VALID
Figure 33. Multiplexed Philips Video—Decode and Master Pixel (YCrCb) Transfer Timing
Table XXX. Multiplexed Philips Video—Decode and Slave Pixel (YCrCb) Timing Parameters
Parameter
Description
Min
Max
Unit
t
VDATA_DSM_D
t
VDATA_DSM_OH
t
CTRL_DSM_S
t
CTRL_DSM_H
VDATA Bus, Decode Slave Multiplexed Philips, Delay
VDATA Bus, Decode Slave Multiplexed Philips, Output Hold
CTRL Signals, Decode Slave Multiplexed Philips, Setup
CTRL Signals, Decode Slave Multiplexed Philips, Hold
N/A
2
2
42
14
N/A
N/A
N/A
ns
ns
ns
ns
(I) CTRL
(O) VCLKO
(O) VDATA
t
CTRL_DSM_H
VALID
t
VDATA_DSM_OH
VALID
VALID
VALID
t
VDATA_DSM_D
t
CTRL_DSM_S
Figure 34. Multiplexed Philips Video—Decode and Slave Pixel (YCrCb) Transfer Timing