
FEDL7204-001DIGEST-01
OKI Semiconductor
ML7204-001
21/42
PIN FUNCTIONAL DESCRIPTION
AIN0N, AIN0P, GSX0, AIN1N, and GSX1
These are transmit analog input and transmit gain adjustment pins. AIN0N and AIN1N are connected to
inverted input pins of internal transmission amplifiers AMP0 and AMP1, and AIN0P is connected to a
noninverting input pin of AMP0. GSX0 and GSX1 are connected to output pins of AMP0 and AMP1. See
Figure 9 for the gain adjustment.
At power down (PDNB = “0” or SPDN = “1”), outputs of GSX0 and GSX1 are in a high impedance state.
When the application does not use AMP0, short-circuit GSX0 and AIN0N and connect AIN0P with AVREF.
When not using AMP1, short-circuit GSX1 and AIN1N.
VFRO0 and VFRO1
These are receive analog output pins. VFRO0 and VFRO1 are connected to output pins of amplifiers AMP2
and AMP3. Output of output signals, VFRO0 and VFRO1, can be selected using the VFRO0 selection register
(VFRO0_SEL) and VFRO1 selection register (VFRO1_SEL): When output is selected (“1”), the receive signal
is output and when output is not selected (“0”), AVREF (about 1.4 V) is output. In power down mode, these
output pins are set to a high impedance state. It is recommended to use output signals through a DC coupling
capacitor.
(Note)
If output selection is changed while the conversation is in progress, a micronoise is generated. Therefore, it is
recommended to select output before starting a call and then start a call.
Before canceling reset or resetting, it is recommended to select output of VFRO0 and VFRO1 to the AVREF
output side.
Figure 9 Analog Interface
C4
VFRO1
10k
VFRO1_SEL
Out : 1.3Vp-p Max.
AMP3
D/A1
D/A0
C3VFRO0
10k
VFRO0_SEL
Out : 1.3Vp-p Max.
AMP2
VREF
AVREF
C6 0.1
μ
F
C5
2.2 to 4.7
μ
F
+
R1
R2
AIN0N
GSX0
10k
AIN0P
C1
Gain = R2/R1 <=
32(+30dB)
R1 : Variable
R2 : 500k Max.
AMP0
A/D0
AIN1N
GSX1
10k
R3
R4
C2
Gain = R4/R3 <=32(+30dB)
R3 : Variable
R4 : 500k Max.
AMP1
A/D1