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參數資料
| 型號： | FEDL7204-001DIGEST-01 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 元件分類： | Codec |
| 英文描述： | The ML7204-001 is a speech CODEC for VoIP. |
| 中文描述： | 在ML7204 - 001是一種VoIP語音編解碼器。 |
| 文件頁數： | 26/42頁 |
| 文件大小： | 792K |
| 代理商： | FEDL7204-001DIGEST-01 |
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FEDL7204-001DIGEST-01
OKI Semiconductor
ML7204-001
26/42
FR0B (DMARQ0B)
FR0B (FRAME/DMA selection register FD_SEL = “0” in frame mode)
This is a transmit frame output pin that outputs data when the transmit buffer for frame access becomes full.
When the transmit buffer becomes full, the pin outputs “L” and retains “L” until the specified number of words
are read from the MCU.
DMARQ0B (FRAME/DMA selection register FD_SEL = “1” in DMA mode)
This is a DMA request output pin that outputs data when the transmit buffer for DMA access becomes full.
When the transmit buffer becomes full, the pin outputs “L” and the value is reset to “H” automatically when an
acknowledgment signal (ACK0B = “0”) and the fall of a read enable signal (RDB = “1”
→
“0”) are received
from the MCU side. This operation is repeated until the specified number of words are read from the MCU.
FR1B (DMARQ1B)
FR1B (FRAME/DMA selection register FD_SEL = “0” in frame mode)
This receive frame output pin outputs data when the receive buffer for frame access becomes empty. When
the receive buffer becomes empty, the pin outputs “L” and retains “L” until the specified number of words are
written from the MCU.
DMARQ1B (FRAME/DMA selection register FD_SEL = “1” in DMA mode)
This a DMA request output pin that outputs data when the receive buffer for DMA access becomes empty.
When the receive buffer becomes empty, the pin outputs “L” and the value is reset to “H” automatically when
an acknowledgment signal (ACK1B = “0”) and the fall of a write enable signal (WRB = “1”
→
“0”) are
received from the MCU side. This opeation is repeated until the specified number of words are written from
the MCU side.
ACK0B/GPIOA[4]
Primary function: ACK0B
This is a DMA acknowledgment input pin for DMARQ0B for transmit buffer DMA access; it is enabled in
DMA mode (FD_SEL = “1”).
When using the pin in frame mode (FD_SEL = “0”), fix this pin to “1”.
Secondary function: GPIOA[4]
When the primary function/secondary function registration register (GPFA[4]) of GPIOA[4] is set to “1”, the pin
functions as a general-purpose I/O port GPIOA[4].
ACK1B/GPIOA[5]
Primary function: ACK0B
This is a DMA acknowledgment input pin for DMARQ1B for receive buffer DMA access; it is enabled in DMA
mode (FD_SEL = “1”).
When using this pin in frame mode (FD_SEL = “0”), fix this pin to “1”.
Secondary function: GPIOA[5]
When the primary function/secondary function registration register (GPFA[5]) of GPIOA[5] is set to “1”, the pin
functions as a general-purpose I/O port GPIOA[5].
GPIOA[0], GPIOA[1], GPIOA[2], and GPIOA[3]
These are general-purpose I/O ports A[3:0].
However, the following secondary functions are assigned to GPIOA[0] and GPIOA[2].
Secondary function of GPIOA[0]: Input pin (DPI) of a dial pulse detecter (DPDET)
Secondary function of GPIOA[2]: Output pin (DPO) of a dial pulse transmitter (DPGEN)
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