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參數資料
| 型號： | GS9092 |
| 廠商： | Gennum Corporation |
| 英文描述： | GS9092 GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI |
| 中文描述： | GS9092 GenLINX - R的第三270Mb / s的串行SDI和DVB - ASI在內 |
| 文件頁數： | 25/58頁 |
| 文件大?。?/td> | 608K |
| 代理商： | GS9092 |
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GS9092 Data Sheet
28202 - 2
September 2005
25 of 58
3.3.2.1 FIFO Status Flags
The FIFO contains internal read and write pointers used to designate which spot in
the FIFO the MPEG data will be read from or written to. These internal pointers
control the status flags FIFO_FULL and FIFO_EMPTY, which are available for
output on the multi-function I/O pins if so programmed (see
Programmable
Multi-function I/O on page 46
).
In the case where the write pointer is originally ahead of the read pointer, the
FIFO_EMPTY flag will be set HIGH when both pointers arrive at the same address
(see box A of
Figure 3-6
). When the FIFO_EMPTY flag goes HIGH, the device will
insert K28.5 stuffing data bytes.
To allow larger K28.5 packet sizes to be inserted, a write pointer offset can be
programmed into the FIFO_EMPTY_OFFSET[9:0] register of the host interface. If
an offset value is programmed in this register, the FIFO_EMPTY flag is set HIGH
when the read and write pointers of the FIFO are at the same address, and will
remain HIGH until the write pointer reaches the programmed offset. While the
FIFO_EMPTY flag is HIGH, the device will continue to insert stuffing characters.
Once the pointer offset has been exceeded, the FIFO_EMPTY flag will go LOW
and the device will begin reading MPEG data out of the FIFO (see box B of
Figure 3-6
).
In the case where the read pointer is originally ahead of the write pointer, the
FIFO_FULL flag will be set HIGH when both pointers arrive at the same address
(see box C of
Figure 3-6
). The application layer can use this flag to determine when
to write to the device.
A read and write pointer offset may also be programmed in the
FIFO_FULL_OFFSET[9:0] register of the host interface. If an offset value is
programmed in this register, the FIFO_FULL flag will be set HIGH when the read
and write pointers of the FIFO are at the same address, and will remain set HIGH
until the read pointer reaches the programmed offset. Once the pointer offset has
been exceeded, the FIFO_FULL flag will be cleared (see box D of
Figure 3-6
).
NOTE: When the FIFO is configured for DVB-ASI mode, the INSSYNCIN pin is
unused, as synchronization characters are inserted based on the FIFO status
flags. The pin should be grounded. When the internal FIFO is bypassed in
DVB-ASI mode, the INSSYNCIN input assumes normal operation as described in
Control Signal Inputs on page 33
.
相關PDF資料 |
PDF描述 |
|---|---|
| GS9092-CNE3 | GS9092 GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI |
| GSC9620 | P-CHANNEL ENHANCEMENT MODE POWER MOSFET |
| GSD2004S-V-GS08 | DIODE 0.225 A, 300 V, 2 ELEMENT, SILICON, SIGNAL DIODE, TO-236AB, ROHS COMPLIANT, PLASTIC PACKAGE-3, Signal Diode |
| GSD2004S-V-GS18 | DIODE 0.225 A, 300 V, 2 ELEMENT, SILICON, SIGNAL DIODE, TO-236AB, ROHS COMPLIANT, PLASTIC PACKAGE-3, Signal Diode |
| GSD2004W-V-GS18 | DIODE 0.225 A, 300 V, SILICON, SIGNAL DIODE, ROHS COMPLIANT, PLASTIC PACKAGE-2, Signal Diode |
相關代理商/技術參數 |
參數描述 |
|---|---|
| GS9092A | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:GS9092A GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI |
| GS9092A_10 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:GenLINX III 270Mb/s Serializer for SDI and DVB-ASI |
| GS9092ACNE3 | 功能描述:RF, RFID, WIRELESS RoHS:是 類別:集成電路 (IC) >> 接口 - 串行器，解串行器 系列:* 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1 系列:- 功能:解串器 數據速率:2.5Gbps 輸入類型:串行 輸出類型:并聯 輸入數:- 輸出數:24 電源電壓:1.8 V ~ 3.3 V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:64-TQFP 裸露焊盤 供應商設備封裝:64-TQFP-EP（10x10） 包裝:管件 |
| GS9092ACNTE3 | 制造商:Semtech Corporation 功能描述:270Mb/s Transmitter for SDI & ASI |
| GS9092CNE3 | 制造商:Gennum Corporation 功能描述: |
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