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參數(shù)資料
型號(hào): GS9092
廠(chǎng)商: Gennum Corporation
英文描述: GS9092 GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI
中文描述: GS9092 GenLINX - R的第三270Mb / s的串行SDI和DVB - ASI在內(nèi)
文件頁(yè)數(shù): 47/58頁(yè)
文件大小: 608K
代理商: GS9092
GS9092 Data Sheet
28202 - 2
September 2005
47 of 58
The registers that determine the signals present on the STAT [2:0] pins are labelled
STAT0_CONFIG[2:0], STAT1_CONFIG[2:0], and STAT2_CONFIG[2:0]
respectively.
Table 3-10
shows the setting of the IO_CONFIG registers for each of
the available output signals.
The default setting for each IO_CONFIG register depends on the configuration of
the device and the internal FIFO mode selected. This is shown in
Table 3-11
.
NOTE: The FIFO_FULL and FIFO_EMPTY flags can only be displayed on the
STAT[2:0] pins when the device is in DVB-ASI mode. If the FIFO_FULL or
FIFO_EMPTY value (100b and 101b respectively) is programmed into the
IO_CONFIG registers when the device is in SMPTE mode, the value will be
ignored and the I/O pin will be set to a high impedance state.
Table 3-9: I/O Signals Available on Multi-function I/O Ports
I/O Status Signal
Reference
H
Section 3.4.1
V
Section 3.4.1
F
Section 3.4.1
FIFO_FULL
Section 3.3.2.1
FIFO_EMPTY
Section 3.3.2.1
Table 3-10: IO_CONFIG Settings
Function
I/O
DETECT_TRS
Setting
IO_CONFIG
Setting
H
Input
LOW
000b
Output
HIGH
000b
V
Input
LOW
001b
Output
HIGH
001b
F
Input
LOW
010b
Output
HIGH
010b
High Z
Output
X
011b
High Z
Output
X
100b
High Z
Output
X
101b
FIFO_FULL
Output
X
110b
FIFO_EMPTY
Output
X
111b
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