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參數資料
| 型號： | GS9092ACNE3 |
| 廠商： | Gennum Corporation |
| 英文描述： | GS9092A GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI |
| 中文描述： | GS9092A GenLINX - R的第三270Mb / s的串行SDI和DVB - ASI在內 |
| 文件頁數： | 30/59頁 |
| 文件大小： | 614K |
| 代理商： | GS9092ACNE3 |
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GS9092A Data Sheet
34715 - 0
February 2006
30 of 59
When there are existing ancillary data packets present in the video data stream,
the device will append the ancillary data to the existing data only when the
ANC_SAV bit is set LOW. In this case, all existing ancillary data must be
contiguous after the EAV. If data is not contiguous, the ancillary data to be inserted
will be written at the first available space where the video is set to blanking levels.
When ANC_SAV is set HIGH, any data present after the SAV will be overwritten.
To overwrite existing ancillary data, the ANC_DATA_REPLACE bit of the
FIFO_EMPTY_OFFSET register must be set HIGH. When this bit is set HIGH,
existing ancillary data will be replaced with the data to be inserted and the
remainder of the line will be set to blanking levels. The device will replace ancillary
data on the line of insertion only. Existing ancillary data on other lines will not be
replaced with blanking levels.
NOTE: If the ANC_SAV and ANC_DATA_REPLACE bits are both set HIGH, and
if ancillary data is inserted on an active picture line, the remainder of the active line
will be set to blanking levels.
Ancillary Data Readback Mode
By default, when the FIFO is in ancillary data insertion mode, the application layer
can only write ancillary data into the FIFO. However, if ANC_DATA_RDBACK is
set HIGH (bit 13 of address 06h), the GS9092A will discontinue inserting ancillary
data into the data stream and the host interface may read the ancillary data
programmed into that half of the FIFO.
3.3.3.2 Clearing the ANC Data FIFO
When switching to ANC FIFO mode, the user must follow one of the 2 methods
below to ensure that the FIFO is fully cleared.
Clearing ANC FIFO Method 1:
1. Enable ANC FIFO mode (write 10b into the FIFO_MODE register).
2. Wait for ANC_FIFO_READY bit to be asserted.
3. Toggle (LOW-to-HIGH-to-LOW) ANC_DATA_SWITCH bit (bit 12 of
IO_CONFIG register) twice.
Clearing ANC FIFO Method 2:
1. Power on device.
2. Set FIFO_EN pin HIGH.
3. Enable ANC FIFO mode (write 10b into the FIFO_MODE register).
4. Set FIFO_EN pin LOW.
5. Set FIFO_EN pin HIGH.
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| GSC9620 | P-CHANNEL ENHANCEMENT MODE POWER MOSFET |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| GS9092ACNTE3 | 制造商:Semtech Corporation 功能描述:270Mb/s Transmitter for SDI & ASI |
| GS9092CNE3 | 制造商:Gennum Corporation 功能描述: |
| GS9092-CNE3 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Gennum Corporation 功能描述: |
| GS90A12-P1M | 功能描述:插入式交流適配器 80W 12V 6.67A RoHS:否 制造商:Phihong 地區:Universal 安裝風格:Wall, Interchangeable Plug 輸入電壓范圍:90 VAC to 264 VAC 輸出端數量:1 輸出功率額定值:5 W 輸出電壓（通道 1）:5 V 輸出電流（通道 1）:1 A 直流輸出連接器:USB Type A 隨附/必需的交流插頭:Required 商用/醫用:Commercial 效率:Level V |
| GS90A15-P1M | 功能描述:插入式交流適配器 90W 15V 6A RoHS:否 制造商:Phihong 地區:Universal 安裝風格:Wall, Interchangeable Plug 輸入電壓范圍:90 VAC to 264 VAC 輸出端數量:1 輸出功率額定值:5 W 輸出電壓（通道 1）:5 V 輸出電流（通道 1）:1 A 直流輸出連接器:USB Type A 隨附/必需的交流插頭:Required 商用/醫用:Commercial 效率:Level V |
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