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| 型號(hào)： | HMS81C43XX |
| 廠商： | Hynix Semiconductor Inc. |
| 英文描述： | CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER FOR TELEVISION |
| 中文描述： | CMOS單芯片8位單片機(jī)電視 |
| 文件頁(yè)數(shù)： | 75/100頁(yè) |
| 文件大小： | 1943K |
| 代理商： | HMS81C43XX |
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HMS81C43xx / GMS87C4060
75
November 2001 ver 1.2
19.3 Multi Interrupt
If two requests of different priority levels are received si-
multaneously, the request of higher priority level is ser-
viced. If requests of the same priority level are received
simultaneously, an internal polling sequence determines
by hardware which request is serviced.
Figure 19-7 Execution of Multi Interrupt
However, multiple processing through software for special
features is possible. Generally when an interrupt is accept-
ed, the I-flag is cleared to disable any further interrupt. But
as user set I-flag in interrupt routine, some further interrupt
can be serviced even if certain interrupt is in progress.
Example: Even though Timer1 interrupt is in progress,
INT0 interrupt serviced without any suspend.
TIMER1: PUSH
A
X
Y
IENH,#80H
IENL,#0
PUSH
PUSH
LDM
LDM
EI
:
:
:
;
Enable INT0 only
;
Disable other
;
Enable Interrupt
:
:
:
LDM
LDM
POP
POP
POP
RETI
IENH,#FFH
IENL,#FEH
Y
X
A
;
Enable all interrupts
enable INT0
disable other
TIMER 1
service
INT0
service
Main Program
service
Occur
TIMER1 interrupt
Occur
INT0
EI
enable INT0
enable other
In this example, the INT0 interrupt can be serviced without any
pending, even TIMER1 is in progress.
Because of re-setting the interrupt enable registers IENH,IENL
and master enable "EI" in the TIMER1 routine.
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