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參數(shù)資料
| 型號： | HSP50110JI-52 |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 通信及網絡 |
| 英文描述： | Digital Quadrature Tuner |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQCC84 |
| 文件頁數(shù)： | 15/24頁 |
| 文件大小： | 199K |
| 代理商： | HSP50110JI-52 |
3
FIGURE 18. DATA FLOW FOR INTEGRATE/DUMP CONFIGURATION
FIGURE 19. DATA FLOW FOR 3RD ORDER CIC CONFIGURATION
FIGURE 20. DATA FLOW WITH CIC STAGE BYPASSED
SIN/COS
VECTOR FROM
CARRIER NCO
R
E
G
R
E
G
LEVEL
DETECT
LOOP
GAIN
SERIALIZE
-1
R
E
G
R
E
G
MANTISSA (1.0 - 1.9375)
EXPONENT (2
0
- 2
7
)
FROM
PROGRAMMABLE
DIVIDER
1
2
-36
CIC SCALER
2
0
-2
-63
CIC SHIFTER
IIN0-9/
QIN0-9
IOUT0-9/
QOUT0-9
ACCUMULATOR
W/ PROGRAMMABLE
LIMITS
X
COMPLEX
MULTIPLIER
LEVEL
DETECT
HI/LO
R
E
G
R
E
G
R
E
G
R
E
G
A
C
C
+
+
R
E
G
L
M
T
M
U
X
REG
REG
L
M
T
M
U
X
R
E
G
R
E
G
R
E
G
R
E
G
R
E
G
LEGEND:
ACC = ACCUMULATOR
LMT = LIMIT
R
= DOWN SAMPLER
MUX = MULTIPLEXER
REG = REGISTER
INDICATES ELEMENTS RUNNING
AT THE OUTPUT SAMPLE RATE
R
11 TAP
FIR FILTER
1ST ORDER CIC (I & D FILTER)
COMPENSATION
FILTER
31
SIN/COS
VECTOR FROM
CARRIER NCO
R
E
G
R
E
G
15 TAP
FIR FILTER
LEVEL
DETECT
LOOP
GAIN
SERIALIZE
-1
R
E
G
3
R
R
E
G
MANTISSA (1.0 - 1.9375)
EXPONENT (2
0
- 2
7
)
FROM
BIT RATE
NCO
R
E
G
-3
R
E
G
1
2
-36
CIC SCALER
2
0
-2
-63
CIC SHIFTER
IIN0-9/
QIN0-9
IOUT0-9/
QOUT0-9
ACCUMULATOR
W/ PROGRAMMABLE
LIMITS
X
COMPLEX
MULTIPLIER
LEVEL
DETECT
HI/LO
R
E
G
R
E
G
R
E
G
R
E
G
A
C
C
A
C
C
A
C
C
+
+
+
+
R
E
G
L
M
T
M
U
X
REG
REG
L
M
T
M
U
X
R
E
G
R
E
G
R
E
G
R
E
G
R
E
G
LEGEND:
ACC = ACCUMULATOR
LMT = LIMIT
R
= DOWN SAMPLER
MUX = MULTIPLEXER
REG = REGISTER
INDICATES ELEMENTS RUNNING
AT THE OUTPUT SAMPLE RATE
3RD ORDER CIC FILTER
COMPENSATION
FILTER
55
(TOP BITS ALIGNED)
SIN/COS
VECTOR FROM
CARRIER NCO
R
E
G
R
E
G
LEVEL
DETECT
LOOP
GAIN
SERIALIZE
R
E
G
MANTISSA (1.0 - 1.9375)
EXPONENT (2
0
- 2
7
)
2
-36
CIC SCALER
2
0
-2
-63
CIC SHIFTER
IIN0-9/
QIN0-9
IOUT0-9/
QOUT0-9
ACCUMULATOR
W/ PROGRAMMABLE
LIMITS
X
COMPLEX
MULTIPLIER
LEVEL
DETECT
HI/LO
R
E
G
R
E
G
R
E
G
R
E
G
+
R
E
G
L
M
T
M
U
X
REG
REG
L
M
T
M
U
X
R
E
G
R
E
G
R
E
G
R
E
G
R
E
G
LEGEND:
ACC = ACCUMULATOR
LMT = LIMIT
R
= DOWN SAMPLER
MUX = MULTIPLEXER
REG = REGISTER
11-15 TAP
FIR FILTER
COMPENSATION
FILTER
21
H
相關PDF資料 |
PDF描述 |
|---|---|
| HSP50110JC-52 | CONN HEADER HM 2MM 100POS |
| HSP50110 | Digital Quadrature Tuner(數(shù)字調諧器) |
| HSP50210 | Digital Costas Loop(數(shù)字Costas鎖相環(huán)) |
| HSP50214VC | Programmable Downconverter |
| HSP50214VI | Programmable Downconverter |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HSP50110JI-52Z | 制造商:Intersil Corporation 功能描述:PB-FREE W/ANNEAL DIGITAL QUADRATURE TUNER 84 PLCC,52MHZ,INDU - Rail/Tube |
| HSP50210 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Digital Costas Loop |
| HSP50210JC-52 | 功能描述:上下轉換器 COSTAS DEMODULATOR,84 PLCC,52MHZ,COMM RoHS:否 制造商:Texas Instruments 產品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| HSP50210JC-52Z | 功能描述:上下轉換器 COSTAS DEMODULATOR 84 PLCC 52MHZ COM RoHS:否 制造商:Texas Instruments 產品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-128 |
| HSP50210JI-52 | 功能描述:上下轉換器 COSTAS DEMODULATOR,84 PLCC,52MHZ,IND RoHS:否 制造商:Texas Instruments 產品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-128 |
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