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參數(shù)資料
| 型號： | HY27US561M |
| 廠商： | Hynix Semiconductor Inc. |
| 英文描述： | 256Mbit (32Mx8bit / 16Mx16bit) NAND Flash |
| 中文描述： | 片256Mbit（32Mx8bit / 16Mx16bit）NAND閃存 |
| 文件頁數(shù)： | 22/44頁 |
| 文件大小： | 733K |
| 代理商： | HY27US561M |
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Rev 0.7 / Oct. 2004
22
HY27SS(08/16)561M Series
HY27US(08/16)561M Series
256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
Automatic Page 0 Read Description.
At powerup, once the supply voltage has reached the threshold level, V
CCth
, all digital outputs revert to their reset
state and the internal NAND device functions (reading, writing, erasing) are enabled.
The device then automatically switches to read mode where, as in any read operation, the device is busy for a time
t
BLBH1
during which data is transferred to the Page Buffer. Once the data transfer is complete the Ready/Busy signal
goes High. The data can then be read out sequentially on the I/O bus by pulsing the Read Enable, R, signal. Figures 18
and 19 show the power-up waveforms for devices featuring the Automatic Page 0 Read option.
Sequential Row Read Disabled
If the device is delivered with sequential row read disabled and Automatic Read page0 at Power-up, only the first page
(page0) will be automatically read after the power-on sequence. Refer to Figure 18.
Sequential Row Read Enabled
If the device is delivered with the Automatic Page 0 Read option only (Sequential Row Read Enabled), the device will
automatically enter Sequential Row Read mode after the power-up sequence, and start reading Page 0, Page 1, etc.,
until the last memory location is reached, each new page being accessed after a time t
BLBH1
.
The Sequential Row Read operation can be inhibited or interrupted by de-asserting CE (set to V
IH
) or by issuing a com-
mand. Refer to Figure 19.
Note: (1). V
CCth
is equal to 2.0V for 3.3V and to 1.5V for 1.8V Power Supply devices.
Data
N+1
Data
N
Last
Data
Data
N+2
tBLBH1
Busy
Vccth (1)
Vcc
ALE
CLE
I/O
RE
RB
CE
WE
Data Output
from Address N to Last Byte or Word in Page
Figure 18. Sequential Row Read Disabled and Automatic Page 0 Read at power-up
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HY27SS16561M | 256Mbit (32Mx8bit / 16Mx16bit) NAND Flash |
| HY27US08561M | 256Mbit (32Mx8bit / 16Mx16bit) NAND Flash |
| HY27SSxxx | 512Mbit (64Mx8bit / 32Mx16bit) NAND Flash |
| HY27SS08121M | 512Mbit (64Mx8bit / 32Mx16bit) NAND Flash |
| HY27SS16121M | 512Mbit (64Mx8bit / 32Mx16bit) NAND Flash |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HY27USXXX | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:512Mbit (64Mx8bit / 32Mx16bit) NAND Flash |
| HY29DL162 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16M(X8/X16)|3.0V DUAL BANK|70|NOR FLASH - 16M |
| HY29DL162BF-12 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:16 Megabit (2M x 8/1M x16) Low Voltage, Dual Bank, Simultaneous Read/Write Flash Memory |
| HY29DL162BF-12I | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:16 Megabit (2M x 8/1M x16) Low Voltage, Dual Bank, Simultaneous Read/Write Flash Memory |
| HY29DL162BF-70 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:16 Megabit (2M x 8/1M x16) Low Voltage, Dual Bank, Simultaneous Read/Write Flash Memory |
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