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參數資料
型號: HY27US561M
廠商: Hynix Semiconductor Inc.
英文描述: 256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
中文描述: 片256Mbit(32Mx8bit / 16Mx16bit)NAND閃存
文件頁數: 23/44頁
文件大小: 733K
代理商: HY27US561M
Rev 0.7 / Oct. 2004
23
HY27SS(08/16)561M Series
HY27US(08/16)561M Series
256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
Note: (1). V
CCth
is equal to 2.0V for 3.3V and to 1.5V for 1.8V Power Supply devices.
Bad Block Management
Devices with Bad Blocks have the same quality level and the same AC and DC characteristics as devices where all the
blocks are valid. A Bad Block does not affect the performance of valid blocks because it is isolated from the bit line and
common source line by a select transistor.The devices are supplied with all the locations inside valid blocks erased
(FFh). The Bad Block Information is written prior to shipping. Any block where the 6th Byte/ 1st Word in the spare
area of the 1st or 2nd page (if the 1st page is Bad) does not contain FFh is a Bad Block.The Bad Block Information
must be read before any erase is attempted as the Bad Block Information may be erased. For the system to be able to
recognize the Bad Blocks based on the original information it is recommended to create a Bad Block table following the
flowchart shown in Figure 20.
Block Replacement
Over the lifetime of the device additional Bad Blocks may develop. In this case the block has to be replaced by copying
the data to a valid block.These additional Bad Blocks can be identified as attempts to program or erase them will give
errors in the Status Register.
As the failure of a page program operation does not affect the data in other pages in the same block, the block can be
replaced by re-programming the current data and copying the rest of the replaced block to an available valid block.
The Copy Back Program command can be used to copy the data to a valid block.
See the “Copy Back Program” section for more details.
Refer to Table 7 for the recommended procedure to follow if an error occurs during an operation.
Table 7: Block Failure
Operation
Erase
Program
Read
Recommended Procedure
Block Replacement
Block Replacement or ECC
ECC
Figure 19. Automatic Page 0 Read at power-up (Sequential Row Read Enable)
Vccth(1)
Vcc
WE
CE
ALE
CLE
RB
I/O
tBLBH1
(Read Busy time)
Busy
Busy
Busy
Busy
tBLBH1
tBLBH1
tBLBH1
Data Out
Data Out
Data Out
Data Out
Page 0
Page 1
Page 2
Page Nth
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