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參數資料
型號: ISP1362
廠商: NXP Semiconductors N.V.
英文描述: Single-chip Universal Serial Bus On-The-Go controller
中文描述: 單芯片通用串行總線和On - The - Go控制器
文件頁數: 38/150頁
文件大小: 647K
代理商: ISP1362
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
06 January 2004
38 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
2. Set the corresponding bits of the OtgInterruptEnable register (bits 0 to 8, or some
of them).
3. Set bit OTG_IRQ_InterruptEnable of the Hc
μ
PInterruptEnable register (bit 9).
4. Set bit InterruptPinEnable of the HcHardwareCon
fi
guration register (bit 0).
When an interrupt is generated on INT1, perform these steps in the interrupt service
routine to get the related OTG status:
1. Read the Hc
μ
PInterrupt register. If OTG_IRQ (bit 9) is set, then step 2.
2. Read the OtgInterrupt register. If any of the bits 0 to 4 are set, then step 3.
3. Read the OtgStatus register.
The OTG state machine routines are called when any of the inputs is changed. These
inputs come from either OTG registers (hardware) or application program (software).
The outputs of the state machine include control signals to the OTG register (for
hardware) and states or error codes (for software). For more information, refer to the
Philips document
ISP136x Embedded Programming Guide
.
11.5 Power saving in the idle state and during wake-up
The ISP1362 can be put in the power saving mode if the OTG device is not in a
session. This signi
fi
cantly reduces the power consumption. In this mode, both the DC
and the HC are suspended. The PLL and the oscillator are stopped, and the charge
pump is in the suspend state.
As an OTG device, however, the ISP1362 is required to respond to the SRP event. To
support this, a LazyClock is kept running when the chip is in the power saving mode.
An SRP event will wake up the chip (that is, enable the PLL and the oscillator).
Besides this, an ID change or B_SESS_VLD detection can also wake up the chip.
These wake-up events can be enabled or disabled by programming the related bits of
the OtgInterruptEnable register before putting the chip in the power saving mode. If
the bit is set, then the corresponding event (status change) will wake up the ISP1362.
If the bit is cleared, then the corresponding event will not wake up the ISP1362.
You can also wake up the ISP1362 from the power saving mode by using software.
This is accomplished by accessing any of ISP1362 registers. Accessing a register will
assert CS of the ISP1362, and therefore, set it awake.
11.6 Current capacity of the OTG charge pump
The ISP1362 uses a built-in charge pump to generate a 5 V V
BUS
supply from a
3.3 V
±
0.3 V voltage source. The only external component required is a capacitor.
The value of this capacitor depends on the amount of current drive required.
Table 7
provides two recommended capacitor values and the corresponding current drive.
Table 7:
Capacitance
27 nF
82 nF
Recommended capacitor values
V
CC
3.0 V to 3.6 V
3.0 V to 3.3 V
3.3 V to 3.6 V
Current
8 mA
14 mA
20 mA
相關PDF資料
PDF描述
ISP1362BD Single-chip Universal Serial Bus On-The-Go controller
ISP1362EE Single-chip Universal Serial Bus On-The-Go controller
ISP1501 Hi-Speed Universal Serial Bus peripheral transceiver
ISP1520 Hi-Speed Universal Serial Bus hub controller
ISP1520BD Hi-Speed Universal Serial Bus hub controller
相關代理商/技術參數
參數描述
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ISP1362BD157 制造商:NXP Semiconductors 功能描述:IC CONTROLLER USB-OTG 64LQFP 制造商:ST-Ericsson 功能描述:IC CONTROLLER USB OTG 64-LQFP
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