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參數資料
型號： ISP1362
廠商： NXP Semiconductors N.V.
英文描述： Single-chip Universal Serial Bus On-The-Go controller
中文描述： 單芯片通用串行總線和On - The - Go控制器
文件頁數： 74/150頁
文件大?。?/td> 647K
代理商： ISP1362
Philips Semiconductors
ISP1362
Single-chip USB OTG controller
Product data
Rev. 03
—
06 January 2004
74 of 150
9397 750 12337
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
15.1.4
HcInterruptStatus register (R/W: 03H/83H)
This register (bit allocation:
Table 41
) provides the status of the events that cause
hardware interrupts. When an event occurs, the HC sets the corresponding bit in this
register. When a bit is set, a hardware interrupt is generated if the interrupt is enabled
in the HcInterruptEnable register (see
Section 15.1.5
) and the MasterInterruptEnable
(MIE) bit is set. The HCD may clear speci
fi
c bits in this register by writing logic 1 to
the bit positions to be cleared. The HC, however, does not clear the bit. The HCD may
not set any of these bits.
Code (Hex): 03
—
read
Code (Hex): 83
—
write
Table 40:
Bit
31 to 18
17 to 16
HcCommandStatus register: bit description
Symbol
Description
-
reserved
SOC[1:0]
SchedulingOverrunCount:
This
fi
eld is incremented on each
scheduling overrun error. It is initialized to 00B and wraps around
at 11B. It needs to be incremented when a scheduling overrun is
detected even if SchedulingOverrun in HcInterruptStatus has
already been set. This is used by the HCD to monitor any
persistent scheduling problems.
-
reserved
HCR
HostControllerReset:
This bit is set by the HCD to initiate a
software reset of the HC. Regardless of the functional state of
the HC, it moves to the USBSuspend state in which most of the
operational registers are reset except those stated otherwise. This
bit is cleared by the HC on completing the reset operation. The
reset operation must be completed within 10 ms. This bit, when
set, should not cause a reset to the Root Hub and no subsequent
reset signaling should be asserted to its downstream ports.
15 to 1
0
Table 41:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcInteruptStatus register: bit allocation
31
30
29
28
27
26
25
24
reserved
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
23
22
21
20
19
18
17
16
reserved
-
-
-
-
-
-
-
-
-
-
-
-
-
-
9
-
-
8
15
14
13
12
11
10
reserved
-
-
7
-
-
6
-
-
5
-
-
4
-
-
3
-
-
2
-
-
1
-
-
0
reserved
-
-
RHSC
0
R/W
FNO
0
R/W
UE
0
R/W
RD
0
R/W
SF
0
R/W
reserved
-
-
SO
0
R/W
相關PDF資料
PDF描述
ISP1362BD Single-chip Universal Serial Bus On-The-Go controller
ISP1362EE Single-chip Universal Serial Bus On-The-Go controller
ISP1501 Hi-Speed Universal Serial Bus peripheral transceiver
ISP1520 Hi-Speed Universal Serial Bus hub controller
ISP1520BD Hi-Speed Universal Serial Bus hub controller
相關代理商/技術參數
參數描述
ISP1362BD 功能描述:USB 接口集成電路 USB OTG CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1362BD,118 功能描述:USB 接口集成電路 USB OTG CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1362BD,151 功能描述:USB 接口集成電路 USB OTG CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1362BD,157 功能描述:USB 接口集成電路 USB OTG CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1362BD157 制造商:NXP Semiconductors 功能描述:IC CONTROLLER USB-OTG 64LQFP 制造商:ST-Ericsson 功能描述:IC CONTROLLER USB OTG 64-LQFP
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