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參數資料
| 型號： | ISP1561 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | ISP1561BM |
| 中文描述： | ISP1561BM |
| 文件頁數： | 44/102頁 |
| 文件大小： | 2875K |
| 代理商： | ISP1561 |
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Philips Semiconductors
ISP1561
USB PCI host controller
Product data
Rev. 01 — 06 February 2003
44 of 102
9397 750 10015
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
11.1.5
HcInterruptEnable register (address: value read from func0 or func1 of address
10H
+
10H)
Each enable bit in the HcInterruptEnable register corresponds to an associated
interrupt bit in the HcInterruptStatus register. The HcInterruptEnable register is used
to control which events generate a hardware interrupt. If the following conditions
occur:
A bit is set in the HcInterruptStatus register.
The corresponding bit in the HcInterruptEnable register is set.
The MIE (MasterInterruptEnable) bit is set.
Then, a hardware interrupt is requested on the host bus.
Writing logic 1 to a bit in this register sets the corresponding bit, whereas writing
logic 0 to a bit in this register leaves the corresponding bit unchanged. On a read, the
current value of this register is returned.
The bit allocation is given in
Table 50
.
2
SF
StartOfFrame:
At the start of each frame, this bit is set by the Host
Controller and an SOF token is generated at the same time.
WritebackDoneHead
: This bit is set immediately after the Host
Controller has written HcDoneHead to HccaDoneHead. Further,
updates of HccaDoneHead occur only after this bit has been
cleared. The HCD should only clear this bit after it has saved the
content of HccaDoneHead.
SchedulingOverrun:
This bit is set when USB schedules for
current Frame overruns and after the update of
HccaFrameNumber. A scheduling overrun causes the SOC
(SchedulingOverrunCount) of HcCommandStatus to be
incremented.
1
WDH
0
SO
Table 49:
Bit
HcInterruptStatus register: bit description
…continued
Symbol
Description
Table 50:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcInterruptEnable register: bit allocation
31
30
MIE
OC
0
0
R/W
R/W
23
22
29
28
27
26
25
24
reserved
0
-
0
-
0
-
0
-
0
-
0
-
21
20
19
18
17
16
reserved
0
-
0
-
0
-
0
-
0
-
0
-
0
-
9
0
-
8
15
14
13
12
11
10
reserved
0
-
0
-
0
-
0
-
0
-
0
-
0
-
0
-
相關PDF資料 |
PDF描述 |
|---|---|
| ISP1561BM | ISP1561BM |
| ISP1562 | Hi-Speed Universal Serial Bus PCI Host Controller |
| ISP1562BE | Hi-Speed Universal Serial Bus PCI Host Controller |
| ISP1581 | Universal Serial Bus 2.0 high-speed interface device |
| ISP1581BD | Universal Serial Bus 2.0 high-speed interface device |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ISP1561 HI-SPEED USB H | 制造商:NXP Semiconductors 功能描述: |
| ISP1561BM | 制造商:NXP Semiconductors 功能描述: |
| ISP1561BM,518 | 功能描述:USB 接口集成電路 USB 2.0 HOST CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1561BM,551 | 功能描述:USB 接口集成電路 USB 2.0 HOST CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1561BM,557 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
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