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參數資料
型號: LC72133V
廠商: SANYO SEMICONDUCTOR CO LTD
元件分類: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 40 MHz, PDSO20
封裝: SSOP-20
文件頁數: 13/23頁
文件大小: 147K
代理商: LC72133V
Clock Time Base Usage Notes
The pull-up resistor used on the clock time base output pin (BO1) should be at least 100 k
. Also, to prevent chattering
we recommend using a Schmitt input at the controller (microprocessor) that receives this signal.
This is to prevent degrading the VCO C/N characteristics when a loop filter is formed using the built-in low-pass filter
transistor. Since the clock time base output pin and the low-pass filter have a common ground internal to the IC, it is
necessary to minimize the time base output pin current fluctuations and to suppress their influence on the low-pass filter.
Other Items
1. Notes on the Phase Comparator Dead Zone
Since correction pulses are output from the charge pump even if the PLL is locked when the charge pump is in the
ON/ON state, the loop can easily become unstable. This point requires special care when designing application
circuits.
The following problems may occur in the ON/ON state.
Side band generation due to reference frequency leakage
Side band generation due to both the correction pulse envelope and low frequency leakage
Schemes in which a dead zone is present (OFF/OFF) have good loop stability, but have the problem that acquiring a
high C/N ratio can be difficult. On the other hand, although it is easy to acquire a high C/N ratio with schemes in
which there is no dead zone, it is difficult to achieve high loop stability. Therefore, it can be effective to select DZA
or DZB, which have no dead zone, in applications which require an FM S/N ratio in excess of 90 to 100 dB, or in
which an increased AM stereo pilot margin is desired. On the other hand, we recommend selecting DZC or DZD,
which provide a dead zone, for applications which do not require such a high FM signal-to-noise ratio and in which
either AM stereo is not used or an adequate AM stereo pilot margin can be achieved.
No. 5427-20/23
LC72133M, 72133V
DZ1
DZ0
Dead zone mode
Charge pump
Dead zone
0
DZA
ON/ON
– –0 s
0
1
DZB
ON/ON
–0 s
1
0
DZC
OFF/OFF
+0 s
1
DZD
OFF/OFF
+ +0 s
S
Rt
≥ 100 k
VDD
VCC
VCO
Vt
AOUT
AIN
PD
LC72133M
LC72133V
A11939
BO1
Microprocessor
Schmitt input
Time base output
Loop filter
相關PDF資料
PDF描述
LC72133M PLL FREQUENCY SYNTHESIZER, 40 MHz, PDSO20
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