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參數(shù)資料
| 型號(hào)： | LC72133V |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 40 MHz, PDSO20 |
| 封裝： | SSOP-20 |
| 文件頁(yè)數(shù)： | 22/23頁(yè) |
| 文件大小： | 147K |
| 代理商： | LC72133V |
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Serial Data I/O Methods
The LC72133 inputs and outputs data using the Sanyo CCB (computer control bus) audio LSI serial bus format. This
LSI adopts an 8-bit address format CCB.
No. 5427-8/23
LC72133M, 72133V
I/O mode
Address
Function
B0
B1
B2
B3
A0
A1
A2
A3
1
2
3
IN1 (82)
IN2 (92)
OUT (A2)
0
01
0
1
00
1
0
01
0
1
00
0
1
01
0
1
00
Control data input mode (serial data input)
24 data bits are input.
See the “DI Control Data (serial data input) Structure”
item for details on the meaning of the input data.
Control data input mode (serial data input)
24 data bits are input.
See the “DI Control Data (serial data input) Structure”
item for details on the meaning of the input data.
Data output mode (serial data output)
The number of bits output is equal to the number of clock
cycles.
See the “DO Output Data (Serial Data Output) Structure”
item for details on the meaning of the output data.
First Data IN1/2
First Data OUT
I/O mode determined
B0
B1
B2
B3
A0
A1
A2
A3
CE
CL
DI
DO
CL: Normal high
CL: Normal low
A11917
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