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參數資料
| 型號： | LC89057W-VF4-E |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 MM, SQFP-48 |
| 文件頁數： | 42/61頁 |
| 文件大小： | 355K |
| 代理商： | LC89057W-VF4-E |
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LC89057W-VF4-E
No. 7202-47/61
CCB address: 0xE8, Command address: 9; Demodulation function: RERR output setting
DI7
DI6
DI5
DI4
DI3
DI2
DI1
DI0
1
0
1
0
CAU
CAL
DI15
DI14
DI13
DI12
DI11
DI10
DI9
DI8
ERWT1
ERWT0
FSERR
RESTA
XTWT1
XTWT0
REDER
RESEL
RERR output contents setting
0: PLL lock error or data error (initial value)
1: PLL lock error or data error or non-PCM data
REDER
8 continuous times parity error flag output setting
0: Output during non-PCM data recognition. (initial value)
1: Output only during sub-frame for which error was generated.
XTWT [1:0]
Clock switch wait time setting after PLL unlock
00: Clock switching after approx. 200
s following oscillation amplifier start
(initial value)
01: Clock switching after approx. 100
s following oscillation amplifier start
10: Clock switching after approx. 50
s following oscillation amplifier start
11: Clock switching after approx. 400
s following oscillation amplifier start
RESTA
RERR output condition setting
0: Output permanent PLL status (Output PLL status even during XIN source)
(initial status)
1: Forcibly output error (Set "H" forcibly to RERR)
FSERR
Setting of error flag output condition through fs change
0: Reflect fs changes to error flag. (initial value)
1: Don't reflect fs changes to error flag.
ERWT [1:0]
RERR wait time setting after PLL lock
00: Error release preamble B after 48 counts. (initial value)
01: Error release preamble B after 24 counts.
10: Error release preamble B after 12 counts.
11: Error release preamble B after 6 counts.
Non-PCM data is reflected to data defined with AOSEL. In other words, it becomes the same as detection data
output to AUDIO.
Output data is muted if an error occurs due to non-PCM data for RESEL.
The RESTA setting is not reflected to the data and clock output pins.
For FSERR, the fs calculation result in the oscillation amplifier stopped status is not reflected. In this case, fs
changes consist only of channel status fs information.
ERWT0,1 is a setting to define the interval until RERR outputs error cancellation ("L") following PLL lock. Since
the audio data following demodulation is output following RERR error cancellation, do not perform this setting if
cutting off of the beginning of data is a problem.
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