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參數資料
| 型號： | LC89057W-VF4-E |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 MM, SQFP-48 |
| 文件頁數： | 6/61頁 |
| 文件大小： | 355K |
| 代理商： | LC89057W-VF4-E |
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LC89057W-VF4-E
No. 7202-14/61
8.1.4 Master clock and clock source switching
The RMCK, RBCK, and RLRCK (hereunder, R system), and the SBCK and SLRCK (hereunder, S system) clock
sources can be selected from the following three master clocks.
(1) PLL source
(256fs or 512fs)
(2) XIN source
(12.288MHz or 24.576MHz)
(3) TMCK source
(256fs)
Clock source switching can either be done in one of two ways, by either setting the R system and the S system on an
interconnected basis, or fixing the S system to the XIN source and setting only the R system. This setting is
performed with SELMTD, OCKSEL, and RCKSEL.
The clock source is automatically switched between PLL clock and XIN clock by locking/unlocking the PLL. The
continuity of the clock is maintained at this time. However, if switching the clock source with SELMTD, the
continuity of the S system is not maintained.
The clock source can be switched to XIN with OCKSEL and RCKSEL, regardless of the PLL status. The clock
source switch command and clock output of the R and S systems are shown below.
Table 8.1. Correspondence between Clock Source Switch Commands and Clock Output Pins
SELMTD
R System Output Clock
S System Output Clock
0
According to OCKSEL
1
According to RCKSEL
Fixed to XIN source
Table 8.2. Relationship between Clock Source Switch Commands and
Clock Sources when PLL Locked/Unlocked
R System Clock Source
S System Clock Source
SELMTD
OCKSEL
RCKSEL
Locked
Unlocked
Locked
Unlocked
0
X
PLL
XIN
PLL
XIN
0
1
X
XIN
X
0
PLL
XIN
1
X
1
XIN
The TMCK source is selected with EXSYNC. This setting results in the same operation as when 256fs is set with
the PLL source. Set PLLSEL to 256fs.
The various clocks are output with the TMCK source as the master clock, similarly to the PLL clock status when
data synchronized with the TMCK source is input. In this case too, the XIN source is switched with OCKSEL and
RCKSEL. When the TMCK source is not supplied or the input data is not synchronized, the source is switched to
the XIN source similarly to the PLL source unlocked status.
The PLL status can always be monitored with RERR even after the XIN source is switched. Moreover, the
processed information can be read with the microcontroller interface regardless of the PLL status.
When the PLL changes from the locked to the unlocked status, the timing for switching the clock from the PLL
source to the XIN source can be changed with XTWT0,1. Use these commands if noise occurs during clock
switching.
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