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參數(shù)資料
型號: MC68C912B32CFU8
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 16-Bit Microcontroller
中文描述: 16-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁數(shù): 84/128頁
文件大小: 748K
代理商: MC68C912B32CFU8
MOTOROLA
84
MC68HC912B32
MC68HC912B32TS/D
Figure 20 Serial Communications Interface Block Diagram
13.2.1 Data Format
The serial data format requires the following conditions:
An idle-line in the high state before transmission or reception of a message.
A start bit (logic zero), transmitted or received, that indicates the start of each character.
Data that is transmitted or received least significant bit (LSB) first.
A stop bit (logic one), used to indicate the end of a frame. (A frame consists of a start bit, a char-
acter of eight or nine data bits and a stop bit.)
A BREAK is defined as the transmission or reception of a logic zero for one frame or more.
This SCI supports hardware parity for transmit and receive.
Rx Baud Rate
Tx Baud Rate
MCLK
DIVIDER
10-11 BIT SHIFT REG
MSB
TxD BUFFER/SC0DRL
TxMTR CONTROL
SC0CR2/SCI CTL 2
SC0CR1/SCI CTL 1
SC0SR1/INT STATUS
DATA RECOVERY
10-11 BIT SHIFT REG
TxD BUFFER/SC0DRL
SC0BD/SELECT
LSB
RxD
PS0
TxD
PS1
P
WAKE-UP LOGIC
SC0CR1/SCI CTL 1
SC0SR1/INT STATUS
SC0CR2/SCI CTL 2
INT REQUEST LOGIC
MSB
LSB
INT REQUEST LOGIC
SCI RECEIVER
SCI TRANSMITTER
DATA BUS
PARITY
DETECT
PARITY
GENERATOR
HC12B32 SCI BLOCK
TO
INTERNAL
LOGIC
BAUD RATE
CLOCK
相關(guān)PDF資料
PDF描述
MC68CK338 Highly Integrated, Low-Power, 32-Bit Microcontroller
MC68EC060 32-Bit Microprocessors.(32位微處理器)
MC68EN360RC25V QUad Integrated Communications Controller Users Manual
MC68EN360CFE25 QUad Integrated Communications Controller Users Manual
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68C912B32FU8 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:16-Bit Microcontroller
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