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參數(shù)資料
型號: MC68HC05P18A
廠商: Motorola, Inc.
英文描述: Low Cost HCMOS Microcontroller(低成本、8位HCMOS微控制器)
中文描述: 低成本HCMOS微控制器(低成本,8位HCMOS微控制器)
文件頁數(shù): 42/130頁
文件大?。?/td> 1200K
代理商: MC68HC05P18A
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Interrupts
Technical Data
MC68HC05P18A
42
Interrupts
MOTOROLA
4.4 Interrupt Types
The interrupts fall into these three categories which are discussed here:
Reset interrupt sequence
Software interrupt (SWI)
Hardware interrupts
4.4.1 Reset Interrupt Sequence
The reset function is not in the strictest sense an interrupt; however, it is
acted upon in a similar manner as shown in
Figure 4-1
. A low-level input
on the RESET pin or internally generated RST signal causes:
The program to vector to its starting address, which is specified by
the contents of memory locations $3FFE and $3FFF
The I bit in the condition code register (CCR) to be set
The MCU to be configured to a known state as described in
Section 5. Resets
.
4.4.2 Software Interrupt (SWI)
The SWI is an executable instruction. It is also a non-maskable interrupt
since it is executed regardless of the state of the I bit in the CCR. As with
any instruction, interrupts pending during the previous instruction are
serviced before the SWI opcode is fetched. The interrupt service routine
address for the SWI instruction is specified by the contents of memory
locations $3FFC and $3FFD.
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