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參數資料
| 型號： | MC68HC05P18A |
| 廠商： | Motorola, Inc. |
| 英文描述： | Low Cost HCMOS Microcontroller(低成本、8位HCMOS微控制器) |
| 中文描述： | 低成本HCMOS微控制器（低成本，8位HCMOS微控制器） |
| 文件頁數： | 65/130頁 |
| 文件大小： | 1200K |
| 代理商： | MC68HC05P18A |
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16-Bit Timer
Timer
MC68HC05P18A
Technical Data
MOTOROLA
16-Bit Timer
65
L
G
R
Becausethetimerhasa16-bitarchitecture,eachfunctionisrepresented
by two registers. Each register pair contains the high and low byte of that
function. Generally, accessing the low byte of a specific timer function
allows full control of that function; however, an access of the high byte
inhibits that specific timer function until the low byte is also accessed.
NOTE:
The I bit in the condition code register (CCR) should be set while
manipulating both the high and low byte registers of a specific timer
function. This prevents interrupts from occurring between the time that
the high and low bytes are accessed.
8.3 Timer
The key element of the programmable timer is a 16-bit free-running
counter, or timer registers, preceded by a prescaler, which divides the
PH2 clock by four. The prescaler gives the timer a resolution of 2.0 ms
when a 4-MHz crystal is used. The counter is incremented to increasing
values during the low portion of the PH2 clock cycle.
The double byte free-running counter can be read from either of two
locations:
The timer registers, TMRH and TMRL
The alternate counter registers, ACRH and ACRL
Both locations will contain identical values. A read sequence containing
only a read of the least-significant bit (LSB) of the counter (TMRL/ACRL)
returns the count value at the time of the read. If a read of the counter
accesses the most-significant bit (MSB) first (TMRH/ACRH), it causes
the LSB (TMRL/ACRL) to be transferred to a buffer. This buffer value
remains fixed after the first MSB byte read even if the MSB is read
several times. The buffer is accessed when reading the counter LSB
(TMRL/ACRL), and thus completes a read sequence of the total counter
value. When reading either the timer or alternate counter registers, if the
MSB is read, the LSB must also be read to complete the read sequence.
See
Figure 8-2
and
Figure 8-3
.
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相關代理商/技術參數 |
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|---|---|
| MC68HC05P18ACDW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05P18ACP | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05P18ADW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05P18AMDW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05P18AMP | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
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