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參數資料
| 型號： | MC68HC705V8 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 中文描述： | 8位微控制器單元（MCU）。（8位微控制器） |
| 文件頁數： | 3/28頁 |
| 文件大小： | 220K |
| 代理商： | MC68HC705V8 |
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AN1224/D
MOTOROLA
3
Frame Headers and Addressing
As outlined above, a J1850 frame can contain one of three types of headers, depending upon a particular
system's requirements. The single-byte header incorporates the frame priority/type and target address into
a single byte. A one-byte consolidated header also consolidates the frame priority/type and target address
into a single byte, with bit 4 = 1 to indicate that it is a one-byte consolidated header. The three-byte header
places the frame priority/type into the first byte, the target address of the intended receiver(s) into the
second byte, and the source address of the frame originator into the third byte. In the priority/type byte of
the three-byte header, bit 4 = 0 to indicate it is a three-byte header.
Frames transmitted on a J1850 network can be either physically or functionally addressed. Since every
node on a J1850 network must be assigned a unique physical address, a frame can be addressed directly
to any particular node by making that node's physical address the target address of the frame. This is
useful in applications such as diagnostic requests, where a specific node's identification may be important.
Functional addressing is used when the data being transmitted can be identified by its particular function,
rather than its intended receiver(s). With this form of addressing, a frame containing data is transmitted
with the function of that data encoded in the header of the frame. All nodes which require the data of that
function can then receive it at the same time. This is of particular importance to networks where the
physical address of the intended receivers is not known, or could change, while their function remains the
same. An example of data that would be functionally addressed is wheel speed, which could be of interest
to multiple receivers, each with a different physical address. Functionally addressing the wheel speed data
would allow it to be transmitted to all intended receivers in a single frame, instead of transmitting the data in
a separate frame for each receiver.
Error Detection
Every frame transmitted onto a J1850 network contains a single CRC byte for error detection. This byte is
usually produced by shifting the header and data bytes through a preset series of feedback shift registers.
The resulting byte is then inserted in the frame following the data bytes. Any node which receives the frame
then shifts the header, data and CRC bytes through an identical series of feedback shift registers, with an
error-free frame always producing the result $C4. Although the CRC byte is normally generated with
hardware, the CRC calculation can be done in software. Any frame in which the error detection byte does
not produce the proper result is discarded by all receivers, and any in-frame response, if required, is not
transmitted.
Arbitration
Arbitration on the multiplex bus is accomplished in a non-destructive manner, allowing the frame with the
highest priority to be transmitted, while any transmitters which lose arbitration simply stop transmitting and
wait for an idle bus to begin transmitting again. If multiple nodes begin to transmit at the same time,
Table 1. J1850 Protocol Options
Feature
1 & 3-Byte
Headers
1 & 3-Byte
Headers
Single-Byte
Header
Bit Encoding
PWM
VPW
VPW
Bus Medium
Dual Wire
Single Wire
Single Wire
Data Rate
41.7 kbps
10.4 kbps
10.4 kbps
Data Integrity
CRC
CRC
CRC
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