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參數(shù)資料
| 型號： | MPC9446 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 2.5V and 3.3V LVCMOS Clock Fanout Buffer |
| 中文描述： | 2.5V和3.3V的LVCMOS時鐘扇出緩沖器 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大小： | 217K |
| 代理商： | MPC9446 |
MPC9446
MOTOROLA
TIMING SOLUTIONS
6
APPLICATIONS INFORMATION
Driving Transmission Lines
The MPC9446 clock driver was designed to drive high
speed signals in a terminated transmission line environment.
To provide the optimum flexibility to the user the output
drivers were designed to exhibit the lowest impedance
possible. With an output impedance of less than 20
the
drivers can drive either parallel or series terminated
transmission lines. For more information on transmission
lines the reader is referred to application note AN1091. In
most high performance clock networks point-to-point
distribution of signals is the method of choice.
point-to-point scheme either series terminated or parallel
terminated transmission lines can be used. The parallel
technique terminates the signal at the end of the line with a
50
resistance to V
CC
÷
2.
This technique draws a fairly high level of DC current and
thus only a single terminated line can be driven by each
output of the MPC9446 clock driver. For the series terminated
case however there is no DC current draw, thus the outputs
can drive multiple series terminated lines. Figure 3. “Single
versus Dual Transmission Lines” illustrates an output driving
a single series terminated line versus two series terminated
lines in parallel. When taken to its extreme the fanout of the
MPC9446 clock driver is effectively doubled due to its
capability to drive multiple lines.
In a
Figure 3. Single versus Dual Transmission Lines
14
IN
MPC9446
OUTPUT
BUFFER
R
S
= 36
Z
O
= 50
OutA
14
IN
MPC9446
OUTPUT
BUFFER
R
S
= 36
Z
O
= 50
OutB0
R
S
= 36
Z
O
= 50
OutB1
The waveform plots in Figure 4. “Single versus Dual Line
Termination Waveforms” show the simulation results of an
output driving a single line versus two lines. In both cases the
drive capability of the MPC9446 output buffer is more than
sufficient to drive 50
transmission lines on the incident
edge. Note from the delay measurements in the simulations a
delta of only 43ps exists between the two differently loaded
outputs. This suggests that the dual line driving need not be
used exclusively to maintain the tight output-to-output skew
of the MPC9446. The output waveform in Figure 4. “Single
versus Dual Line Termination Waveforms” shows a step in
the waveform, this step is caused by the impedance
mismatch seen looking into the driver. The parallel
combination of the 36
series resistor plus the output
impedance does not match the parallel combination of the
line impedances. The voltage wave launched down the two
lines will equal:
V
L
= V
S
( Z
0
÷
(R
S
+R
0
+Z
0
))
Z
0
= 50
|| 50
R
S
= 36
|| 36
R
0
= 14
V
L
= 3.0 ( 25
÷
(18+14+25)
= 1.31V
At the load end the voltage will double, due to the near
unity reflection coefficient, to 2.5V. It will then increment
towards the quiescent 3.0V in steps separated by one round
trip delay (in this case 4.0ns).
Figure 4. Single versus Dual Waveforms
TIME (nS)
V
3.0
2.5
2.0
1.5
1.0
0.5
0
2
4
6
8
10
12
14
OutB
t
D
= 3.9386
OutA
t
D
= 3.8956
In
Since this step is well above the threshold region it will not
cause any false clock triggering, however designers may be
uncomfortable with unwanted reflections on the line. To better
match the impedances when driving multiple lines the
situation in Figure 5. “Optimized Dual Line Termination”
should be used. In this case the series terminating resistors
are reduced such that when the parallelcombination is added
to the output buffer impedance the line impedance is perfectly
matched.
Figure 5. Optimized Dual Line Termination
14
MPC9446
OUTPUT
BUFFER
R
S
= 22
Z
O
= 50
R
S
= 22
Z
O
= 50
14
+ 22
k
22
= 50
k
50
25
= 25
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MPC9446AC | 功能描述:時鐘緩沖器 2.5 3.3V 275MHz Clock Generator RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| MPC9446ACR2 | 功能描述:時鐘驅動器及分配 FSL 1-10 LVCMOS Fanout Buffer RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MPC9446FA | 功能描述:時鐘緩沖器 2.5 3.3V 250MHz Clock Generator RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| MPC9446FAR2 | 功能描述:時鐘驅動器及分配 FSL 1-10 LVCMOS Fanout Buffer RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MPC9447 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:3.3V/2.5V 1:9 LVCMOS Clock Fanout Buffer |
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