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參數(shù)資料
| 型號： | P87LPC760 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Low power, low price, low pin count (14 pin) microcontroller with 1 kbyte OTP |
| 中文描述： | 低功耗，低價格，低引腳數(shù)（14針），1字節(jié)檢察官辦公室微控制器 |
| 文件頁數(shù)： | 19/56頁 |
| 文件大小： | 290K |
| 代理商： | P87LPC760 |
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Philips Semiconductors
Preliminary data
P87LPC760
Low power, low price, low pin count (14 pin)
microcontroller with 1 kbyte OTP
2002 Mar 07
16
External Interrupt Inputs
The P87LPC760 has one individual interrupt input as well as the
Keyboard Interrupt function. The latter is described separately in this
section. The interrupt input are identical to those present on the
standard 80C51 microcontroller.
The external source can be programmed to be level-activated or
transition-activated by setting or clearing bit IT0 in Register TCON. If
IT0 = 0, external interrupt 0 is triggered by a detected low at the
INT0 pin. If IT0 = 1, external interrupt 0 is edge triggered. In this
mode if successive samples of the INT0 pin show a high in one
cycle and a low in the next cycle, interrupt request flag IE0 in TCON
is set, causing an interrupt request.
Since the external interrupt pin is sampled once each machine
cycle, an input high or low should hold for at least 6 CPU Clocks to
ensure proper sampling. If the external interrupt is
transition-activated, the external source has to hold the request pin
high for at least one machine cycle, and then hold it low for at least
one machine cycle. This is to ensure that the transition is detected
and that interrupt request flag IE0 is set. IE0 is automatically cleared
by the CPU when the service routine is called.
If the external interrupt is level-activated, the external source must
hold the request active until the requested interrupt is actually
generated. If the external interrupt is still asserted when the interrupt
service routine is completed another interrupt will be generated. It is
not necessary to clear the interrupt flag IE0 when the interrupt is
level sensitive, it simply tracks the input pin level.
If the external interrupt is enabled when the P87LPC760 is put into
Power Down or Idle mode, the interrupt will cause the processor to
wake up and resume operation. Refer to the section on Power
Reduction Modes for details.
SU01534
WAKEUP
(IF IN POWER
DOWN)
EA
(FROM IEN0
REGISTER)
INTERRUPT
TO CPU
IE0
EX0
BOF
EBO
KBF
EKB
WDT
EWD
CM1
EC1
TF0
ET0
TF1
ET1
RI + TI
ES
ATN
EI2
Figure 9. Interrupt Sources, Interrupt Enables, and Power Down Wakeup Sources
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| P87LPC760BDH | 功能描述:8位微控制器 -MCU 80C51 1K/128 OTP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| P87LPC760BDH,112 | 功能描述:8位微控制器 -MCU 80C51 1K/128 OTP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| P87LPC760BDH,118 | 功能描述:8位微控制器 -MCU 14 PIN MCU 1KBYTE OTP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| P87LPC760BN | 功能描述:8位微控制器 -MCU 1K/128 OTP 2.7-6V COMM DIP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| P87LPC760BN,112 | 功能描述:8位微控制器 -MCU 1K/128 OTP 2.7-6V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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