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參數資料
| 型號： | P87LPC760 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Low power, low price, low pin count (14 pin) microcontroller with 1 kbyte OTP |
| 中文描述： | 低功耗，低價格，低引腳數（14針），1字節檢察官辦公室微控制器 |
| 文件頁數： | 26/56頁 |
| 文件大?。?/td> | 290K |
| 代理商： | P87LPC760 |
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Philips Semiconductors
Preliminary data
P87LPC760
Low power, low price, low pin count (14 pin)
microcontroller with 1 kbyte OTP
2002 Mar 07
23
SU01167
CLOCK SELECT
CLOCK
SOURCES
CLOCK
OUT
XTAL
SELECT
INTERNAL RC OSCILLATOR
CRYSTAL: LOW FREQUENCY
CRYSTAL: MEDIUM FREQUENCY
CRYSTAL: HIGH FREQUENCY
EXTERNAL CLOCK INPUT
10-BIT RIPPLE COUNTER
RESET
COUNT
COUNT 256
COUNT 1024
OSCILLATOR STARTUP TIMER
DIVIDE-BY-M
(DIVM REGISTER)
AND
CLKR SELECT
CPU
CLOCK
÷
1/
÷
2
CLKR
(UCFG1.3)
POWER DOWN
POWER MONITOR RESET
FOSC0 (UCFG1.0)
FOSC1 (UCFG1.1)
FOSC2 (UCFG1.2)
Figure 18. Block Diagram of Oscillator Control
CPU Clock Modification: CLKR and DIVM
For backward compatibility, the CLKR configuration bit allows setting
the P87LPC760 instruction and peripheral timing to match standard
80C51 timing by dividing the CPU clock by two. Default timing for
the P87LPC760 is 6 CPU clocks per machine cycle while standard
80C51 timing is 12 clocks per machine cycle. This division also
applies to peripheral timing, allowing 80C51 code that is oscillator
frequency and/or timer rate dependent. The CLKR bit is located in
the EPROM configuration register UCFG1, described under EPROM
Characteristics
In addition to this, the CPU clock may be divided down from the
oscillator rate by a programmable divider, under program control.
This function is controlled by the DIVM register. If the DIVM register
is set to zero (the default value), the CPU will be clocked by either
the unmodified oscillator rate, or that rate divided by two, as
determined by the previously described CLKR function.
When the DIVM register is set to some value N (between 1 and
255), the CPU clock is divided by 2 * (N + 1). Clock division values
from 4 through 512 are thus possible. This feature makes it possible
to temporarily run the CPU at a lower rate, reducing power
consumption, in a manner similar to Idle mode. By dividing the clock,
the CPU can retain the ability to respond to events other than those
that can cause interrupts (i.e. events that allow exiting the Idle
mode) by executing its normal program at a lower rate. This can
allow bypassing the oscillator startup time in cases where Power
Down mode would otherwise be used. The value of DIVM may be
changed by the program at any time without interrupting code
execution.
Power Monitoring Functions
The P87LPC760 incorporates power monitoring functions designed
to prevent incorrect operation during initial power up and power loss
or reduction during operation. This is accomplished with two
hardware functions: Power-On Detect and Brownout Detect.
Brownout Detection
The Brownout Detect function allows preventing the processor from
failing in an unpredictable manner if the power supply voltage drops
below a certain level. The default operation is for a brownout
detection to cause a processor reset, however it may alternatively
be configured to generate an interrupt by setting the BOI bit in the
AUXR1 register (AUXR1.5).
The P87LPC760 allows selection of two Brownout levels: 2.5 V or
3.8 V. When V
DD
drops below the selected voltage, the brownout
detector triggers and remains active until V
DD
is returns to a level
above the Brownout Detect voltage. When Brownout Detect causes
a processor reset, that reset remains active as long as V
DD
remains
below the Brownout Detect voltage. When Brownout Detect
generates an interrupt, that interrupt occurs once as V
DD
crosses
from above to below the Brownout Detect voltage. For the interrupt
to be processed, the interrupt system and the BOI interrupt must
both be enabled (via the EA and EBO bits in IEN0).
When Brownout Detect is activated, the BOF flag in the PCON
register is set so that the cause of processor reset may be
determined by software. This flag will remain set until cleared by
software.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| P87LPC760BDH | 功能描述:8位微控制器 -MCU 80C51 1K/128 OTP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P87LPC760BDH,112 | 功能描述:8位微控制器 -MCU 80C51 1K/128 OTP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P87LPC760BDH,118 | 功能描述:8位微控制器 -MCU 14 PIN MCU 1KBYTE OTP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P87LPC760BN | 功能描述:8位微控制器 -MCU 1K/128 OTP 2.7-6V COMM DIP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| P87LPC760BN,112 | 功能描述:8位微控制器 -MCU 1K/128 OTP 2.7-6V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
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