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參數資料
| 型號： | THS0842IPFBG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 2-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48 |
| 封裝： | GREEN, PLASTIC, TQFP-48 |
| 文件頁數： | 11/30頁 |
| 文件大小： | 503K |
| 代理商： | THS0842IPFBG4 |
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THS0842
DUAL-INPUT, 8-BIT, 40 MSPS LOW-POWER ANALOG-TO-DIGITAL CONVERTER
WITH SINGLE OR DUAL PARALLEL BUS OUTPUT
SLAS246A – DECEMBER 1999 – REVISED AUGUST 2000
19
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
analog input (continued)
To maintain the frequency performance outlined in the specifications, the total source impedance should be
limited to the following equation with fCLK = 80 MHz, CI = 5 pF, RSW = 200 :
R
S t
1
÷ 2f
CLK
C
I
In(256) –R
SW
So, for applications running at a lower fCLK, the total source resistance can increase proportionally.
The analog input of the THS0842 is a differential input that can be configured in various ways depending on
the signal source and the required level of performance. A fully differential connection (Figure 20) will deliver
the best performance from the converter. A dc voltage source, CML, equal to 1.5 V (typical for AVDD = 3 V), is
made available to the user to help simplify circuit design when using an ac coupled differential input. This low
output impedance voltage source(300
, typical) is not designed to be a reference or to be loaded, but makes
an excellent dc bias source and stays well within the analog input common mode voltage range over
temperature. If load on that pin is foreseen, the use of an external buffer is recommended. Defining VREFD =
VREFT – VREFB, each single-ended analog input is limited to be between VCML + VREFD/2 and VCML –
VREFD/2. See Table 1 for the minimum and maximum reference input levels.
For the ac-coupled differential input with AVDD = 3 V (see Figure 23), full scale is achieved when the +I/Q and
–I/Q input signals are 0.5 VPP, with –I/Q being 180 degrees out of phase with +I/Q. The converter will be at
positive full scale when the +I/Q input is at CML + 0.25 V and the –I/Q input is at CML – 0.25 V (+I/Q + I/Q –
= 0.5 V). Conversely, the converter will be at negative full scale when the +I/Q input is equal to CML – 0.25 V
and –I/Q is at CML + 0.25 V (I/Q+ + I/Q– = –0.5 V) (see Figure 19).
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相關代理商/技術參數 |
參數描述 |
|---|---|
| THS0842PFB | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL-INPUT, 8-BIT, 40 MSPS LOW-POWER ANALOG-TO-DIGITAL CONVERTER WITH SINGLE OR DUAL PARALLEL BUS OUTPUT |
| THS10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EURO TERMINAL BLOCKS |
| THS10064 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:10-BIT 6 MSPS, SIMULTANEOUS SAMPLING ANALOG-TO-DIGITAL CONVERTER |
| THS10064CDA | 功能描述:模數轉換器 - ADC 10-Bit 6 MSPS Quad Ch DSP/uP Ifc RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| THS10064CDAG4 | 功能描述:模數轉換器 - ADC 10-Bit 6 MSPS Quad Ch DSP/uP Ifc RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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