欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號: TLC320AC01CPM
廠商: TEXAS INSTRUMENTS INC
元件分類: 模擬信號調理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP64
封裝: PLASTIC, QFP-64
文件頁數: 15/93頁
文件大小: 601K
代理商: TLC320AC01CPM
2–9
2.9
Operating Frequencies
2.9.1
Master and Stand-Alone Operating Frequencies
The sampling (conversion) frequency is derived from the master-clock (MCLK) input by equation 11:
fs
+ Sampling (conversion) frequency +
MCLK
(A register value)
(B register value)
2 (11)
The inverse is the time between the falling edges of two successive primary frame-synchronization signals.
The input and output data clock (SCLK) frequency is given in equation 12:
SCLK frequency
+
MCLK frequency
4
(12)
2.9.2
Slave and Codec Operating Frequencies
The slave operating frequencies are either the default values or programmed by the control data word from
the master and codec conversion and the data frequencies are determined by the externally applied SCLK
and FS signals.
2.10 Switched-Capacitor Filter Frequency (FCLK)
The filter clock (FCLK) is an internal clock signal that determines the filter band-pass frequency and is the
B counter clock. The frequency of the filter clock is derived by equation 13:
FCLK
+
MCLK
(A register value)
2
(13)
2.11 Filter Bandwidths
The low-pass (LP) filter – 3 dB corner is derived in equation 14:
f(LP)
+ FCLK
40
+
MCLK
40
(A register value)
2
(14)
The high-pass (HP) filter – 3 dB corner is derived in equation 15:
f(HP)
+
Sampling frequency
200
+
MCLK
200
2
(A register value)
(B register value)
(15)
2.12 Master and Stand-Alone Modes
The difference between the master and stand-alone modes is that in the stand-alone mode there are no
slave devices. Functionally these two modes are the same. In both, the AIC internally generates the shift
clock and frame-sync signal for the serial communications. These signals and the filter clock (FCLK) are
derived from the input master clock.The master clock applied at the MCLK input determines the internal
device timing. The shift clock frequency is a divide-by-four of the master clock frequency and shifts both the
input and output data at DIN and DOUT, respectively, during the frame-sync interval (16 shift clocks long).
To begin the communication sequence, the device is reset (see Section 2.2.1), and the first frame sync
occurs approximately 648 master clocks after the reset condition disappears.
2.12.1
Register Programming
All register programming occurs during secondary communications, and data is latched and valid on the
sixteenth falling edge of SCLK. After a reset condition, eight primary and secondary communications cycles
are required to set up the eight programmable registers. Registers 1 through 8 are programmed in
secondary communications intervals 1 through 8, respectively. If the default value for a particular register
is desired, that register does not need to be addressed during the secondary communications. The no-op
command addresses the pseudo-register (register 0), and no register programming takes place during this
communications. The no-op command allows phase shifts of the sampling period without reprogramming
any register.
During the eight register programming cycles, DOUT is in the high-impedance state. DOUT is released on
the rising edge of the eighth primary internal frame-sync interval. In addition, each register can be read back
相關PDF資料
PDF描述
TLC320AC01CFN SPECIALTY ANALOG CIRCUIT, PQCC28
TLC320AC02IFN SPECIALTY ANALOG CIRCUIT, PQCC28
TLC320AC02CPMR SPECIALTY ANALOG CIRCUIT, PQFP64
TLC320AC02IPM SPECIALTY ANALOG CIRCUIT, PQFP64
TLC320AC02IFNR SPECIALTY ANALOG CIRCUIT, PQCC28
相關代理商/技術參數
參數描述
TLC320AC01CPMR 功能描述:接口—CODEC Single Ch Codec-BW RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLC320AC02 制造商:TI 制造商全稱:Texas Instruments 功能描述:Single-Supply Analog Interface Circuit
TLC320AC02C 制造商:TI 制造商全稱:Texas Instruments 功能描述:Single-Supply Analog Interface Circuit
TLC320AC02CFN 功能描述:接口—CODEC SNGL CH Codec Bandwidth Indpendent RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLC320AC02CFNR 功能描述:接口—CODEC SNGL CH Codec Bandwidth Indpendent RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
主站蜘蛛池模板: 苏尼特右旗| 城市| 桃源县| 福泉市| 岱山县| 萨嘎县| 吴堡县| 白玉县| 武宣县| 屏南县| 启东市| 平塘县| 灵宝市| 乌拉特后旗| 商水县| 梅河口市| 内丘县| 济阳县| 涪陵区| 沙湾县| 桦川县| 漳平市| 玉溪市| 芦山县| 宣武区| 饶阳县| 阿拉善盟| 耒阳市| 新安县| 郓城县| 临清市| 新郑市| 翼城县| 托克托县| 鹿泉市| 吉木萨尔县| 肥东县| 彝良县| 中方县| 会宁县| 沅江市|