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參數資料
| 型號： | TLC320AC01CPM |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 模擬信號調理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQFP64 |
| 封裝： | PLASTIC, QFP-64 |
| 文件頁數： | 7/93頁 |
| 文件大小： | 601K |
| 代理商： | TLC320AC01CPM |
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2–2
Stand-Alone Mode
The operating mode under which the device generates and uses its own shift clock
and frame-sync signal. The device has no slave devices.
X
The X represents a don’t-care bit position within the control register format.
2.2
Reset and Power-Down Functions
2.2.1
Reset
The TLC320AC01 resets both the internal counters and registers, including the programmed registers, by
any of the following:
Applying power to the device, causing a power-on reset (POR)
Applying a low reset pulse to RESET
Reading in the programmable software reset bit (DS01 in register 6)
PWR DWN resets the counters only and preserves the programmed register contents.
2.2.2
Conditions of Reset
The two internal reset signals used for the reset and synchronization functions are as follows:
1.
Counter reset: This signal resets all flip-flops and latches that are not externally programmed with
the exception of those generating the reset pulse itself. In addition, this signal resets the software
power-down bit.
Counter reset = power-on reset + RESET + RESET bit + PWR DWN
2.
Register reset: This signal resets all flip-flops and latches that are not reset by the counter reset
except those generating the reset pulse itself.
Register reset = power-on reset + RESET + RESET bit
Both reset signals are at least one master-clock period long and release on the falling edge of the master
clock.
2.2.3
Software and Hardware Power-Down
Given the definitions and conditions of RESET, the software-programmed power-down condition is cleared
by resetting the software bit (DS00 in register 6) to zero. It is also cleared by either cycling the power to the
device, bringing PWR DWN low, or bringing RESET low.
PWR DWN powers down the entire chip ( < 1 mA ). The software-programmable power-down bit only
powers down the analog section of the chip ( < 3 mA ), which allows a software power-up function. Cycling
PWR DWN high to low and back to high resets all flip-flops and latches that are not externally programmed,
thereby preserving the register contents.
When PWR DWN is not used, it should be tied high.
2.2.4
Register Default Values After POR, Software Reset, or RESET Is Applied
Register 1 – The A Register
The default value of the A-register data is decimal 18 as shown below.
DS07
DS06
DS05
DS04
DS03
DS02
DS01
DS00
0
1
0
1
0
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相關代理商/技術參數 |
參數描述 |
|---|---|
| TLC320AC01CPMR | 功能描述:接口—CODEC Single Ch Codec-BW RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLC320AC02 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Single-Supply Analog Interface Circuit |
| TLC320AC02C | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Single-Supply Analog Interface Circuit |
| TLC320AC02CFN | 功能描述:接口—CODEC SNGL CH Codec Bandwidth Indpendent RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLC320AC02CFNR | 功能描述:接口—CODEC SNGL CH Codec Bandwidth Indpendent RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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