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| 型號(hào)： | TLV320DAC32IRHBR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, DAC WITH PROGRAMMABLE PLL, PQCC32 |
| 封裝： | 5 X 5 MM, GREEN, PLASTIC, QFN-32 |
| 文件頁(yè)數(shù)： | 25/69頁(yè) |
| 文件大?。?/td> | 1242K |
| 代理商： | TLV320DAC32IRHBR |
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AUDIO DAC DIGITAL VOLUME CONTROL
AUDIO DAC COMMON-MODE ADJUSTMENT
AUDIO DAC POWER CONTROL
www.ti.com........................................................................................................................................ SLAS506B – NOVEMBER 2006 – REVISED DECEMBER 2008
The audio DAC includes a digital volume control block which implements a programmable digital gain. The
volume level can be varied from 0-dB to –63.5-dB in 0.5-dB steps, in addition to a mute bit, independently for
each channel. The volume level of both channels can also be changed simultaneously by the master volume
control. Gain changes are implemented with a soft-stepping algorithm, which only changes the actual volume by
a maximum of one step per input sample, either up or down, until the desired volume level is reached. The rate
of soft-stepping can be further slowed to one step per two input samples through a register bit.
Because of soft-stepping, the host does not know the exact time that the DAC has been actually muted. This
may be important if the host wishes to mute the DAC before making a significant change, such as changing
sample rates. In order to help with this situation, the device provides a flag back to the host via a read-only
register bit that alerts the host when the part has completed the soft-stepping and the actual volume has reached
the desired volume level. These flags can be found at register locations: Page0/Reg-51/D1, Page0/Reg-58/D1,
Page0/Reg-65/D1, Page0/Reg-72/D1. The soft-stepping feature can be disabled through register programming. If
soft-stepping is enabled, the MCLK signal should be kept applied to the device until the DAC power-down flag is
set. When this flag is set, the internal soft-stepping process and power down sequence is complete, and the
MCLK can then be stopped if desired.
The TLV320DAC32 also includes functionality to detect when the user switches on or off the de-emphasis or
digital audio processing functions. It is recommended to first (1) soft-mute the DAC volume control, (2) change
the operation of the digital effects processing by downloading the new filter coefficients to the appropriate
registers, and then (3) soft-unmute the device. This avoids any possible pop/clicks in the audio output due to
instantaneous changes in the filtering. A similar algorithm should be used when first powering up or down the
DAC. The system should begin operation at power up with the volume control muted, then soft-steps the volume
up to the desired volume level. At power down, the logic first soft-steps the volume down to the mute level, and
then powers down the circuitry.
The output common-mode voltage and output range of the audio DAC are determined by an internal bandgap
reference, in contrast to other DACS that may use a resistor-divider version of the supply. This voltage reference
scheme is used to reduce the coupling of power supply noise (such as 217-Hz noise in a GSM cellphone) into
the audio signal path.
However, due to the possible wide variation in analog supply range (2.7V – 3.6V), an output common-mode
voltage setting of 1.35V, which would be used for a 2.7V supply case, will be overly conservative if the supply is
actually much larger, such as 3.3V or 3.6V. In order to optimize device operation, the TLV320DAC32 includes a
programmable output common-mode level, which can be set by register programming to a level most appropriate
to the actual supply range used by a particular application. The output common-mode level can be varied among
four different values, ranging from 1.35V (most appropriate for low supply ranges, near 2.7V) to 1.8V (most
appropriate for high supply ranges, near 3.6V). Note that there is also some limitation on the range of DVDD
voltage as well in determining which setting is most appropriate .
Table 4. Appropriate Settings
CM SETTING
RECOMMENDED AVDD_DAC,
RECOMMENDED DVDD
DRVDD
1.35
2.7 V – 3.6 V
1.525 V – 1.95 V
1.50
3.0 V – 3.6 V
1.65 V – 1.95 V
1.65 V
3.3 V – 3.6 V
1.8 V – 1.95 V
1.8 V
3.6 V
1.95 V
The stereo DAC can be fully powered up or down, and in addition, the analog circuitry in each individual DAC
channel can be powered up or down independently. This provides power savings when only a mono playback
stream is needed.
Copyright 2006–2008, Texas Instruments Incorporated
31
Product Folder Link(s): TLV320DAC32
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| TLV320DAC32IRHBRG4 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Lo-Pwr Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| TLV320DAC32IRHBT | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Low Power Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| TLV320DAC32IRHBTG4 | 功能描述:音頻數(shù)/模轉(zhuǎn)換器 IC Low Power Stereo DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量: 分辨率:16 bit 接口類型:I2S, UBS 轉(zhuǎn)換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數(shù)量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| TLV320DAC33NIZQC | 制造商:Texas Instruments 功能描述: |
| TLV320DAC33NIZQCR | 制造商:Texas Instruments 功能描述: |
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