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參數(shù)資料
| 型號(hào)： | TMC2491AR2C |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 顏色信號(hào)轉(zhuǎn)換 |
| 英文描述： | COLOR SIGNAL ENCODER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 4/36頁 |
| 文件大小： | 208K |
| 代理商： | TMC2491AR2C |
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TMC2490A/TMC2491A
PRODUCT SPECIFICATION
12
Horizontal and Vertical Timing
Horizontal and vertical video timing in the TMC2490(1)A is
preprogrammed for line-locked systems with a 2x pixel
clock of 27.0 MHz.
Table 3 and Table 4 show timing parameters for NTSC and
PAL standards and the resulting TMC2490(1)A analog out-
put timing. The user provides exactly 720 pixels of active
video per line. In master mode, the TMC2490(1)A precisely
controls the duration and activity of every segment of the
horizontal line and vertical eld group. In external sync slave
mode, it holds the end-of-line blank state (e.g. front porch
for active video lines) until it receives the next horizontal
sync signal. In CCIR-656 slave mode, it likewise holds each
end-of-line blank state until it receives the next end of active
video (EAV) signal embedded in the incoming data stream.
The vertical eld group comprises several different line
types based upon the Horizontal line time.
H
= (2 x SL) + (2 x SH) [Vertical sync pulses]
= (2 x EL) + (2 x EH) [Equalization pulses]
SMPTE 170M NTSC and Report 624 PAL video standards
call for specic rise and fall times on critical portions of the
video waveform. The chip does this automatically, requiring
no user intervention. The TMC2490(1)A digitally denes
Figure 2a. HDEL TIming
Figure 2b. CCIR-656 Horizontal Interval Timing Detail
Figure 3. Master Mode Horizontal Interval Timing Detail
PXCK
PD7-0
CB732 Y732 CR732 Y733
CBSEL
HYSNC
1464
1472
1592
1600
65-2490A-03
625-line
525-line
CB734 Y734 CR734 Y735 CB736 Y736
HDEL = 00
HDEL = 01
HDEL = 10
HDEL = 11
CR736 CB800 Y800 CR800 Y801 CB801 CR856 Y857
CB0
Y0
CR0
Y1
CB2
0
1727
1715
PXCK
PD7-0
1430
1435
FF
00
FV1
HSYNC (Output)
HDEL = 2
PDC
00
FV0
CB0
Y0
1440
1464
1472
1724
1712
tDO
tHP
tSP
1727
1715
17
3
0
65-2490A-04
625-line
525-line
tDO
tHS
SAV
EAV
PXCK
PD7-0
1430
1435
HSYNC (Output)
HDEL = 2
PDC
CB0
Y0
1440
1464
1472
17
3
tDO
tH
tS
1727
1715
0
65-2490A-05
625-line
525-line
tDO
tHS
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