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參數資料
| 型號： | TPS40074RHLT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩壓器 |
| 英文描述： | 2 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PQCC20 |
| 封裝： | GREEN, PLASTIC, QFN-20 |
| 文件頁數： | 7/41頁 |
| 文件大小： | 765K |
| 代理商： | TPS40074RHLT |
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VDG03174
tBLANKING
7 Current Limit Trips
(HDRV Cycle Terminated by Current Limit Trip)
7
Soft-Start
Cycles
HDRV
Clock
VILIM
VVINVSW
SS
SLUS617B – APRIL 2005 – REVISED OCTOBER 2006
APPLICATION INFORMATION (continued)
The second event that can cause ILIM to return to its nominal value is for an internal timeout to expire. This is
illustrated in Figure 10 B as T3. Here SW never rises to VDD-2, for whatever reason, and the internal timer
times out. This allows the ILIM pin to start its transition back to its nominal value.
Prior to ILIM starting back to its nominal value, short circuit sensing is not enabled. In normal operation, this
insures that the SW node is at a higher voltage than ILIM when short circuit sensing starts, avoiding false trips
while allowing for a quicker blanking delay than would ordinarily be possible. Placing a capacitor across RILIM
sets an exponential approach to the normal voltage at the ILIM pin. This exponential “decay” of the short circuit
threshold can be used to compensate for ringing on the SW node after its rising edge and to help compensate
for slower turn-on MOSFETs. Choosing the proper capacitance requires care. If the capacitance is too large, the
voltage at ILIM does not approach the desired short circuit level quickly enough, resulting in an apparent shift in
short circuit threshold as pulse width changes.
The comparator that looks at ILIM and SW to determine if a short circuit condition exists has a clamp on its SW
input. This clamp makes the SW node never appear to fall more than 1.4 V (approximately, could be as much as
2 V at – 40°C) below VDD. While ILIM is more than 1.4 V below VDD short circuit sensing is effectively disabled,
giving a programmable absolute blanking time. As a general rule, it is best to make the time constant of the R-C
at the ILIM pin 20% or less of the nominal pulse width of the converter (See Equation 13)
The second tier protection incorporates a fault counter. The fault counter is incremented on each cycle with an
overcurrent pulse and decremented on a clock cycle without an overcurrent pulse. When the counter reaches
seven (7) a fault condition is declared by the controller. When this happens, the output drivers turn both
MOSFETs off. Seven soft-start cycles are initiated (without activity on the HDRV and LDRV outputs) and the
PWM is disabled during this period. The counter is decremented on each soft-start cycle. When the counter is
decremented to zero the PWM is re-enabled and the controller attempts to restart. If the fault has been removed
the output starts up normally. If the output fault is still present the counter counts seven overcurrent pulses and
re-enters the second tier fault mode. Refer to Figure 11 for typical fault protection waveforms.
Figure 11. Typical Fault Protection Waveforms
15
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