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參數資料
型號： TPS65950ZXNR
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PBGA209
封裝： 7 X 7 MM, 0.40 MM PITCH, PLASTIC, BGA-209
文件頁數： 100/167頁
文件大小： 2566K
代理商： TPS65950ZXNR
4.1.1
VDD1 Dc-dc Regulator
4.1.1.1 VDD1 Dc-dc Regulator Characteristics
TPS65950
Integrated Power Management/Audio Codec
SWCS032 – OCTOBER 2008
www.ti.com
The VDD1 dc-dc regulator is a stepdown dc-dc converter with a configurable output voltage. The
programming
of
the
output
voltage
and
the
characteristics
of
the
dc-dc
converter
are
SmartReflex-compatible. The regulator can be put in sleep mode to reduce its leakage (pulse frequency
modulation [PFM]) or power-down mode when it is not being used. Table 4-2 lists the characteristics of the
regulator.
Table 4-2. VDD1 Dc-dc Regulator Characteristics
Parameter
Comments
Min(1)
Typ(2)
Max(3)
Unit
Input voltage range
2.7
3.6
4.5
V
Output voltage
0.6
1.45
V
Output voltage step
Covering the 0.6 to 1.45-V range
12.5
mV
Output accuracy(4)
0.6 to < 0.8 V
–6%
6%
0.8 to 1.45 V
–4%
4%
Switching frequency
3.2
MHz
IO = 100 mA, sleep
82%
Conversion efficiency(5), Figure 4-2 in active and
100 mA < IO < 400 mA
85%
sleep modes
400 mA < IO < 600 mA
80%
600 mA < IO < 1.1 mA
75%
Active mode
1.2
A
Output current
Sleep mode
10
mA
Ground current (IQ)
Off at 30
°C
3
A
Sleep, unloaded
30
50
Active, unloaded, not switching
300
Short-circuit current
VIN = VMax
2.2
A
Load regulation
0 < IO < IMax
20
mV
IO = 10 mA to (IMax/2)+10 mA,
Transient load regulation(6)
–65
50
mV
Maximum slew rate is IMax/2/100 ns.
Line regulation
10
mV
Transient line regulation
300 mVPP ac input, 10-s rise and fall time
10
mV
Startup time
0.25
1
ms
Recovery time
From sleep mode to on mode with constant
<10
100
s
load
Slew rate (rising or falling)(7)
4
8
16
mV/
s
Output shunt resistor (pulldown)
150
Value
0.7
1
1.3
H
External coil
DCR
0.1
Saturation current
1.8
A
Value
8
10
12
F
External capacitor(8)
Equivalent series resistance (ESR) at
0
20
m
switching frequency
(1)
Min = Minimum value
(2)
Typ = Typical value
(3)
Max = Maximum value
(4)
Accuracy includes all variations (line and load regulations, line and load transients, temperature, and process).
(5)
VBAT = 3.8 V, VDD1 = 1.3 V, Fs = 3.2 MHz, L = 1
H, L
DCR = 100 m, C = 10 F, ESR = 10 m
(6)
Output voltage must discharge the load current completely and settle to its final value within 100
s.
(7)
Load current varies proportional to the output voltage. The slew rate is for increasing and decreasing voltages and the maximum load
current is 1.1 A.
(8)
Under current load condition step:
Imax/2 (550 mA) in 100 ns with a
±20% external capacitor accuracy or
Imax/3 (367 mA) in 100 ns with a
±50% external capacitor accuracy
Power Module
38
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